Rockwell RFX144V24-S23, Designer'S Manual, Page: 48 / 198

RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide
3-14 1070
Table 3-1. Interface Memory Bit Definitions (Cont'd)
Mnemonic Location Default Name/Description
PDM 07:5 0 Parallel Data Mode. When control bit PDM is a 1, parallel data mode is selected. If the modem is a
transmitter, data for transmission is accepted from DBUFF (10:0-7) in modes other than V.23 or
TBUFFER (12:0-7) in V.23 mode (CONF = 24). If the modem is a receiver, the modem provides
received data to DBUFF (10:0-7) and to the RXD output pin. The setting of the PDM bit must be followed
by the setting of the SETUP bit to become active.
When the PDM bit is a 0, serial data mode is selected. If the modem is a transmitter, data for
transmission is accepted from the TXD input pin. When the modem is a receiver, the modem provides
the received data only to the RXD output pin.
PE 09:0 0 Parity Error (Parallel Mode). When set, status bit PE indicates that a character with bad parity was
received. When reset, a character with good parity was received. (V.23)
PEN 14:3 0 Parity Enable (Parallel Mode). When control bit PEN is set, parity generation and checking is enabled.
When PEN is a 0, parity generation and checking is disabled. (V.23)
Note: The parity bit is NOT masked out in the receive parallel buffer (DBUFF). The Parity bit is the MSB
of the character contained in DBUFF. Start and Stop bit(s) are stripped from the data before it is written
to DBUFF.
PIA 1F:7 – Programmable Interrupt Active. When control bit PIE is enabled (PIE is a 1) and the interrupt
condition is true as specified by ITBMSK, ITADRS, TRIG, and ANDOR, the modem asserts ~IRQ1 if
PIREQ has been previously reset by the host (usually after servicing the previous interrupt). Status bit
PIA is set by the modem when the above occurs. PIA is reset when the host resets PIREQ.
PIDR 05:5 0 Programmable Interrupt at Data Rate. When control bit PIDR is a 1, the programmable interrupt runs
at the data rate. When PIDR is a 0, the programmable interrupt runs at the sample rate (9600 Hz). The
PIDR bit is valid in all modes except tone, voice/audio codec, audio, and speakerphone.
PIE 1F:4 0 Programmable Interrupt Enable. When control bit PIE is enabled (PIE is a 1) and the interrupt
condition is true as specified by ITBMSK, ITADRS, TRIG, and ANDOR, the modem asserts ~IRQ1 if
PIREQ has been previously reset by the host (usually after servicing the previous interrupt). Status bit
PIA is set by the modem when the above occurs. When PIE is a 0 (interrupt disabled), ITBMSK,
ITADRS, TRIG, ANDOR, and PIREQ have no effect on ~IRQ1 and PIA.
PIREQ 1F:3 – Programmable Interrupt Request. When control bit PIE is enabled (PIE is a 1) and the interrupt
condition is true as specified by ITBMSK, ITADRS, TRIG, and ANDOR, the modem asserts ~IRQ1 if
control bit PIREQ has been previously reset by the host. PIREQ is set by the modem when the
programmable interrupt condition is true. The host must reset PIREQ after servicing the interrupt since
the modem does not reset PIREQ. If PIREQ is not reset when the interrupt condition occurs again, the
modem will not assert ~IRQ1.
PN 0C:3 – PN Sequence. When the modem is configured as a high speed transmitter, status bit PN = 1 signals
that the PN sequence is being sent. When PN = 0, the PN sequence is not being transmitted. When the
modem is configured as a high speed receiver, status bit PN = 1 indicates the PN portion of the training
sequence is being received. When PN = 0, the PN portion of training is not being received.
PNDET 0D:6 – PN Detected. When status bit PNDET is a 1, the receiver has detected the PN portion of the training
sequence. When PNDET is a 0, PN has not been detected.
PNSUC 08:3 – PN Success. When status bit PNSUC is a 1, the receiver has successfully trained at the end of the PN
portion of the high speed training sequence. When PNSUC is a 0, a successful training has not
occurred. PNSUC is still valid after the CDET bit is set to a 1.
PR 1D:5 – Rate Sequence Period. When status bit PR is a 1 during transmit, the modem is sending the rate
sequence (PR). When reset to a 0, the rate sequence (PR) is not being sent. When set to a 1 during
receive, the modem is receiving the rate sequence (PR). When reset to a 0, the rate sequence (PR) is
not being received. (V.17 or V.33 modes.)