Rockwell RFX144V24-S23, Designer'S Manual, Page: 6 / 198

RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide
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List of Figures
Figure 2-1. Modem Functional Interconnect Diagram......................................................................................................... 2-2
Figure 2-2. MDP Pin Signals - 100-Pin PQFP .................................................................................................................... 2-3
Figure 2-3. XIA Pin Signals - 28-Pin PLCC ........................................................................................................................ 2-5
Figure 2-4. Microprocessor Interface Waveforms ............................................................................................................ 2-15
Figure 2-5. Transmitter Signal Timing .............................................................................................................................. 2-16
Figure 2-6. Receiver Signal Timing .................................................................................................................................. 2-16
Figure 2-7. Eye Pattern Timing........................................................................................................................................ 2-17
Figure 2-8. Eye Pattern Circuit ........................................................................................................................................ 2-18
Figure 3-1. Interface Memory Map .................................................................................................................................... 3-2
Figure 3-2. Parallel Data Transfer Routine....................................................................................................................... 3-20
Figure 3-3. DTMF Receiver Status Bit Timing .................................................................................................................. 3-22
Figure 3-4. FSK 7E Flag Detector Timing ........................................................................................................................ 3-23
Figure 3-5. V.23 Modes Setup Procedure........................................................................................................................ 3-25
Figure 3-6. Caller ID Mode Setup Procedure ................................................................................................................... 3-26
Figure 3-7. High Speed Mode Status Bit Timing............................................................................................................... 3-27
Figure 4-1. Host Flowchart - RAM Data Read and RAM Data Write ................................................................................... 4-5
Figure 5-1. HDLC Frame ................................................................................................................................................... 5-1
Figure 5-2. CRC Polynomial Implementation ..................................................................................................................... 5-2
Figure 5-3. HDLC Process ................................................................................................................................................ 5-3
Figure 5-4. HDLC Signals Timing ...................................................................................................................................... 5-4
Figure 6-1. Modem Tone Detection Diagram ..................................................................................................................... 6-1
Figure 6-2. Typical Single Filter Response ......................................................................................................................... 6-4
Figure 6-3. Typical Cascade Filter Response..................................................................................................................... 6-4
Figure 6-4. Z-Plane Pole-Zero Diagram ............................................................................................................................. 6-5
Figure 6-5. Bandwidth and Offset Frequencies .................................................................................................................. 6-6
Figure 6-6. Alpha-zero Center Frequency .......................................................................................................................... 6-6
Figure 7-1. Autodialer Flowchart ........................................................................................................................................ 7-5
Figure 8-1. Encoder Implementation.................................................................................................................................. 8-2
Figure 8-2. AGC Operation................................................................................................................................................ 8-4
Figure 8-3. AGC Implementation ....................................................................................................................................... 8-5
Figure 8-4. AGC Implementation ....................................................................................................................................... 8-6
Figure 8-5. AGC Parameters Operating Envelope ............................................................................................................. 8-7
Figure 8-6. Decoder Implementation................................................................................................................................ 8-10
Figure 9-1. Basic Block Diagram of G3 Facsimile .............................................................................................................. 9-2
Figure 9-2. G3 Facsimile Procedure .................................................................................................................................. 9-2
Figure 9-3. Transmit Calling Tone (CNG) (1100 Hz) .......................................................................................................... 9-3
Figure 9-4. Detecting CNG Tone (1100 Hz) ....................................................................................................................... 9-4
Figure 9-5. Transmit Called Tone (CED) (2100 Hz)............................................................................................................ 9-5
Figure 9-6. Detecting CED Tone (2100 Hz) ....................................................................................................................... 9-6
Figure 9-7. HDLC Frame Structure.................................................................................................................................... 9-7
Figure 9-8. Phase C Format ............................................................................................................................................ 9-10
Figure 9-9. Transmit FSK/HDLC Signals.......................................................................................................................... 9-11
Figure 9-10. Setup for Programmable Interrupt................................................................................................................ 9-12
Figure 9-11. Low Speed Configuration Subroutine. .......................................................................................................... 9-13
Figure 9-12. Transmit Preamble ...................................................................................................................................... 9-14
Figure 9-13. Low Speed Interrupt-Driven Transmit........................................................................................................... 9-15
Figure 9-14. Receive FSK/HDLC Signals......................................................................................................................... 9-16
Figure 9-15. Low Speed Interrupt-Driven Receive............................................................................................................ 9-17
Figure 9-16. High Speed Configuration Setup .................................................................................................................. 9-18
Figure 9-17. Transmitting TCF......................................................................................................................................... 9-19
Figure 9-18. High Speed Message Transmission ............................................................................................................. 9-20
Figure 9-19. High Speed Interrupt-Driven Transmit.......................................................................................................... 9-21
Figure 9-20. High Speed Reception Setup ....................................................................................................................... 9-22
Figure 9-21. High Speed Interrupt Driven Receive ........................................................................................................... 9-23
Figure 9-22. Valid Training Sequence Check ................................................................................................................... 9-24
Figure 9-23. ECM Frame Structure.................................................................................................................................. 9-26
Figure 9-24. ECM Message Protocol Example................................................................................................................. 9-27