Panasonic FP0H Series, User Manual, Page: 162 / 200

High-speed Counter Function
10-22
10.4.2 Sample Program (Upper Limit Control, Reset, Addition)
The following shows the program for performing two cam outputs (R100, R101) according to
the elapsed value of the high-speed counter CH0. When the elapsed value reaches the target
value (ON set value), the cam output turns on, and when it reaches the target value (OFF set
value), it turns off. When it reaches the target value (ON set value), the interrupt program is
started. When the elapsed value exceeds the upper limit, it returns to 0.
Code Value Description
ⓐ
Upper limit When the elapsed value exceeds the upper limit, it returns to 0.
ⓑ
Target value 2: OFF
set value The cam output is performed according to the target values.
In this example, the ON set value is smaller than the OFF set value for each
target value. Therefore,
When added: When the elapsed value reaches the ON set value, the cam
output turns on, and when it reaches the OFF set value, it turns off.
When subtracted: When the elapsed value falls below the OFF set value, the
cam output turns on, and when it falls below the ON set value, it turns off.
ⓒ
Target value 2: ON
set value
ⓓ
Target value 1: OFF
set value
ⓔ
Target value 1: ON
set value
①
Execution condition
When the execution condition turns on from off, the instruction is executed
and the cam control starts.
②
High-speed counter
instruction active flag
The high-speed counter instruction active flag turns ON during the execution
of the instruction. Even when the reset signal exists, the execution of the
instruction continues.
③
Cam output The output turns ON/OFF according the set values.
④
Interrupt
When the elapsed value reaches the ON set value, the interrupt program
starts.
⑤
Reset signal
When the hardware reset (X2) or software reset DT90052 (bit 0) turns on, the
elapsed value of the high-speed counter is rest to 0. The outputs
corresponding to the elapsed value 0 (both R100 and R101 in the above
example) become off.
(Note 1): It shows the hardware reset input (X2) for the high-speed counter CH0.