Omron CS1W-HCA12-V1, Operation Manual

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111
AR Area
Section 6-4
AR 08 00 High-speed counter 1
status Target Value
Comparison
Flag OFF: In Target Comparison Mode
for the CTBL instruction, indicates
that comparison is not in progress.
Note: This flag is always OFF in
range comparison mode for the
CTBL instruction.
ON: In Target Comparison Mode for
the CTBL instruction, indicates that
comparison is in progress.
Note: Unlike range comparison,
once target value comparison is
started, it is continuously executed.
This bit can be used to confirm
whether or not comparison is actu-
ally in progress.
Unit Enabled
01 Overflow/
Underflow
Flag OFF: In Linear Counter Mode, there
is no overflow or underflow. In Ring
Counter Mode, this flag is always 0.
ON: In Linear Counter Mode, an
overflow or underflow has occurred.
The high-speed counter PV is fixed
at one of the upper limits. This flag is
cleared when the High-speed
Counter Start Bit is turned OFF.
02 (Reserved
by system.) ---
03 Phase-Z
Input Reset
Flag (ON for
one cycle) If the high-speed counter reset
method is phase Z + software reset
(1 Hex is set in bits 04 to 07 in
DM 6605), this flag turns ON for one
cycle when the high-speed counter’s
PV is reset.
Note: If the phase-Z signal (reset
input) turns ON while the High-
speed Counter Reset Bit (bit 01 in
AR 09) is ON, this flag turns ON for
one cycle when the high-speed
counter’s PV is reset.
04 ABS PV read status ABS No. of
rotations
read error 0: No error
1: Error occurred
05 ABS No. of
rotations
read com-
pleted 0: Not reading or reading
1: Reading completed (This is set at
the completion of receiving serial
data on No. of rotations.)
Address Bits Function Details Controlled
by
Forced
set/reset