Octagon 6000 Series, User Manual

Page: 127 / 233

Counter timer controller 6000 Series user’s manual
15-8
Because the interrupts are typically edge triggered, the interrupt is not
generated until OUT goes low and then high again (CLOCK count +1).
Mode 3 – Square wave mode
This mode is useful when it is necessary to generate a Square Wave
output. This mode will be used most often for counter 2, which is the
pre-scalar for counters 0 and 1. Since the GATE of counter 2 is always
enabled, counter 2 will operate in this mode. Counters 0 and 1 can also
use this mode to further divide the output of counter 2. The OUT signal
is HIGH after the control word is written. After the COUNT value of N
is written, the OUT signal will go LOW on the negative edge of the next
CLOCK cycle. If N is an EVEN number, OUT will remain LOW for N/2
CLOCK cycles, if N is an ODD number, OUT is LOW for N/2 + 1
CLOCK cycles. OUT then goes HIGH and remains HIGH until N
equals 0. The value N is then automatically reloaded into the counter
and the period repeats.
The GATE input being HIGH enables the counter. If GATE input is
LOW then counting is inhibited. If GATE goes LOW while OUT is
LOW, OUT will go HIGH immediately. The positive transition of GATE
will reload the count value of N into the counter on the next CLOCK
cycle. The COUNT value will then be decremented on subsequent
CLOCK cycles.
Because interrupts are typically positive edge triggered, the interrupt
will not be generated until OUT goes low and then high again (CLOCK
count +1).
Mode 4 - Software triggered strobe
This mode can be useful when no external events are needed or provided
to generate an interrupt by the CTC. Once the count at counter 0 or
counter 1 has been reached an interrupt will be generated. This mode
requires control of the GATE and, therefore, cannot be used for the
counter 2.
This mode is useful in order to generate a one CLOCK pulse width
OUTPUT after a COUNT value of N has expired. The OUT signal is
HIGH after the control word is written. After the COUNT value of N is
written, the value is loaded into the counter on the next CLOCK cycle.
The value is not decremented on this cycle. The OUT signal remains
HIGH until the counter reaches a 0 value. OUT then cycles LOW for
one CLOCK period. OUT will then remain HIGH after this cycle until a
COUNT value is rewritten to the counter.
GATE input equal to 1 enables the counter.
GATE input equal to 0 inhibits the counter.
The GATE input does not effect the OUT signal in any other way.
Because interrupts are typically positive edge triggered, the interrupt
will not be generated until OUT goes low and then high again (CLOCK
count +1).