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UM10360_0
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 00.06 — 5 June 2009
191 of 808
NXP Semiconductors
UM10360
Chapter 11: LPC17xx USB device controller
10.1.2 USB Clock Status register (USBClkSt - 0x5000 CFF8)
This register holds the clock availability status. The bits of this register are ORed together
to form the USB_NEED_CLK signal. When enabling a clock via USBClkCtrl, software
should poll the corresponding bit in USBClkSt. If it is set, then software can go ahead with
the register access. Software does not have to repeat this exercise for every access,
provided that the USBClkCtrl bits are not disturbed. USBClkSt is a read only register.
10.2 Device interrupt registers
10.2.1 USB Interrupt Status register (USBIntSt - 0x5000 C1C0)
The USB Device Controller has three interrupt lines. This register allows software to
determine their status with a single read operation. All three interrupt lines are ORed
together to a single channel of the vectored interrupt controller. This register also contains
the USB_NEED_CLK status and EN_USB_INTS control bits. USBIntSt is a read/write
register.
Table 167. USBClkCtrl register (USBClkCtrl - address 0x5000 CFF4) bit description
Bit
Symbol
Description
Reset
value
0
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA
1
DEV_CLK_EN
Device clock enable. Enables the usbclk input to the
device controller
0
2
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA
3
PORTSEL_CLK_EN
Port select register clock enable.
NA
4
AHB_CLK_EN
AHB clock enable
0
31:5
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA
Table 168. USB Clock Status register (USBClkSt - address 0x5000 CFF8) bit description
Bit
Symbol
Description
Reset
value
0
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA
1
DEV_CLK_ON
Device clock on. The usbclk input to the device
controller is active.
0
2
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA
3
PORTSEL_CLK_ON
Port select register clock on.
NA
4
AHB_CLK_ON
AHB clock on.
0
31:5
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
NA