LITE5200B User’s Manual, Rev. 2
Glossary-6
Freescale Semiconductor
Least-significant bit (lsb).
The bit of least value in an address, register, field, data
element, or instruction encoding.
Least-significant byte (LSB).
The byte of least value in an address, register, data element,
or instruction encoding.
Little-endian.
A byte-ordering method in memory where the address
n
of a word
corresponds to the
least-significant byte
. In an addressed memory word, the bytes
are ordered (left to right) 3, 2, 1, 0, with 3 being the
most-significant byte
. See
Big-endian
.
M
Mantissa.
The decimal part of logarithm.
MEI (modified/exclusive/invalid).
Cache coherency
protocol used to manage caches on
different devices that share a memory system. Note that the PowerPC architecture
does not specify the implementation of a MEI protocol to ensure cache coherency.
Memory access ordering.
The specific order in which the processor performs load and
store memory accesses and the order in which those accesses complete.
Memory-mapped accesses.
Accesses whose addresses use the page or block address
translation mechanisms provided by the MMU and that occur externally with the
bus protocol defined for memory.
Memory coherency.
An aspect of caching in which it is ensured that an accurate view of
memory is provided to all devices that share system memory.
Memory consistency.
Refers to agreement of levels of memory with respect to a single
processor and system memory (for example, on-chip cache, secondary cache, and
system memory).
Memory management unit (MMU).
The functional unit that is capable of translating an
effective
(logical)
address
to a physical address, providing protection mechanisms,
and defining caching methods.
Modified
state.
MEI state (M) in which one, and only one, caching device has the valid
data for that address. The data at this address in external memory is not valid.
Most-significant bit (msb).
The highest-order bit in an address, registers, data element, or
instruction encoding.
Most-significant byte (MSB).
The highest-order byte in an address, registers, data
element, or instruction encoding.
N
NaN.
An abbreviation for not a number; a symbolic entity encoded in floating-point
format. There are two types of NaNs—signaling NaNs and quiet NaNs.
No-op.
No-operation. A single-cycle operation that does not affect registers or generate
bus activity.