CHAPTER 13 DMA FUNCTIONS (DMA CONTROLLER)
Preliminary User’s Manual U15905EJ1V0UD
405
13.3 Control Registers
13.3.1 DMA source address registers 0 to 3 (DSA0 to DSA3)
These registers are used to set the DMA source addresses (28 bits each) for DMA channel n (n = 0 to 3). They
are divided into two 16-bit registers, DSAnH and DSAnL.
(1) DMA source address registers 0H to 3H (DSA0H to DSA3H)
These registers can be read or written in 16-bit units.
DSAnH
(n = 0 to 3)
External memory, on-chip peripheral I/O
Internal RAM
IR
0
1
DMA source address specification
Set the DMA source addresses (A25 to A16). During DMA transfer, they
store the next DMA transfer source address.
SA25 to
SA16
After reset:
Undefined R/W
Address:
DSA0H: FFFFF082H, DSA1H: FFFFF08AH,
DSA2H: FFFFF092H, DSA3H: FFFFF09AH
SA23
SA22
SA21
SA20
SA19
SA18
SA17
SA16
IR
0
0
0
0
0
SA25
SA24
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
(2) DMA source address registers 0L to 3L (DSA0L to DSA3L)
These registers can be read or written in 16-bit units.
DSAnL
(n = 0 to 3)
After reset:
Undefined R/W
Address:
DSA0L: FFFFF080H, DSA1L: FFFFF088H,
DSA2L: FFFFF090H, DSA3L: FFFFF098H
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
SA15
SA14
SA13
SA12
SA11
SA10
SA9
SA8
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
Set the DMA source addresses (A15 to A0). During DMA transfer, they
store the next DMA transfer source address.
SA15 to
SA0
Summary of Contents for V850ES/SA2 UPD703201
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