CHAPTER 7 TIMER/COUNTER FUNCTION
Preliminary User’s Manual U15905EJ1V0UD
217
(1) Timers 0 and 1 (TM0 to TM1)
TMn functions as a 16-bit free-running timer or as an event counter for an external signal. Besides being used
for cycle measurement, TMn can be used for pulse output (n = 0, 1).
TMn is read-only, in 16-bit units.
Cautions 1. The TMn register can only be read. If the TMn register is written, the subsequent
operation is undefined.
2. If the TMCAEn bit of the TMCn0 register is cleared (0), a reset is performed
asynchronously.
TM1
FFFFF610H
0000H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TM0
FFFFF600H
0000H
Address
After reset
0
TMn performs the count-up operations of an internal count clock or external count clock. Timer start and stop
are controlled by the TMCEn bit of timer mode control register n0 (TMCn0) (n = 0, 1).
The internal or external count clock is selected by the ETIn bit of timer mode control register n1 (TMCn1) (n =
0, 1).
(a) Selection of the external count clock
TMn operates as an event counter.
When the ETIn bit of timer mode control register n1 (TMCn1) is set (1), TMn counts the valid edges of the
external clock input (TIn), synchronized with the internal count clock. The valid edge is specified by valid
edge select register n (SESn) (n = 0, 1).
Caution
When the INTPn0/TIn/TCLRn pin is used as TIn (external clock input pin), disable the
INTPn0 interrupt or set CCn0 to compare mode (n = 0, 1).
Summary of Contents for V850ES/SA2 UPD703201
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