NEC PD78212, User Manual

Page: 57 / 487

28
µ
PD78214 Sub-Series
(a) When functioning as a port
Signals applied to these pins can be read and these pins can be tested, regardless of whether these pins
are acting as secondary function pins.
(b) When functioning as control-signal input pins
(i) NMI (non-maskable interrupt)
Apply an external non-maskable interrupt request signal to this pin. The external interrupt mode
register (IMTM0) specifies whether an interrupt is detected at its rising or falling edge.
(ii) INTP0 to INTP5 (interrupts from peripherals)
Apply external interrupt request signals to these pins. When an interrupt request signal is detected
at the edge specified by the external interrupt mode registers (INTM0 and INTM1), at any of the INTP0
to INTP5 pins, an interrupt is generated. (For details, see
Chapter 11 .)
The INTP0 to INTP3 and INTP5 pins can also be used as external trigger input pins for a range of
functions, as described below.
• INTP0: Capture trigger input for eight-bit timer/counter unit 1, and trigger input for real-time output
port
• INTP1: Capture trigger input for eight-bit timer/counter unit 2
• INTP2: External count clock input for eight-bit timer/counter unit 2
• INTP3: Capture trigger input for 16-bit timer/counter
• INTP5: External trigger input for A/D converter
(iii) CI (clock input)
External clock input for eight-bit timer/counter unit 2
(iv) ASCK (asynchronous serial clock)
External baud-rate clock input.
(v) SI (serial input)
Serial data input (when three-wire serial input mode is used)
(3) P30-P37 (port 3): Tristate inputs/outputs
Port 3, an eight-bit input and output port with output latches, is provided with software-programmable pull-
up resistors. Each pin can be used as an input or output pin by specifying the port-3 mode register (PM3).
It also acts as a control signal pin.
It can be used in either of the following two operating modes, as listed in Table 2-2, by specifying the port-
3 mode control register (PMC3). The signals applied to these pins can be read and these pins can be tested
regardless of whether these pins are acting as secondary function pins.
When the RESET signal is input, the output of port 3 becomes high impedance, such that it functions as an
input port, resulting in the contents of the output latches becoming undefined.