NEC PD78212, User Manual

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274
µ
PD78214 Sub-Series
(2) Serial bus interface control register (SBIC)
This 8-bit register consists of bits controlling the serial bus statuses and flags indicating the statuses of data
input from the serial bus.
The 8-bit manipulation instruction and bit manipulation instruction can read and write the contents of the
register. The bits have different read/write attributes. Fig. 10-11 shows the format.
The value of the SBIC register is set to 00H when RESET is input.
Fig. 10-11 Format of SBIC Register (1/2)
Bus release trigger bit (W)
Command trigger bit (W)
Bus release detection flag (R)
Command detection flag (R)
BSYE
7
ACKD
6
ACKE
5
ACKT
4
CMDD
3
RELD
2
CMDT
1
RELT
0
SBIC (00H when RESET is input)
Trigger output control bit for the bus release signal (REL). When this bit is s et, the SO latch is set to 1,
then the RELT bit is automatically cleared to 0.
RELT
Trigger output control bit for the command signal (CMD). When this bit is set, the SO latch is cleared to 0,
then the CMDT bit is automatically cleared to 0.
CMDT
1
RELD
When transfer start instruction is executed
2 When RESET signal is input
3 CTXE = CRXE = 0
Clearing condition (RELD = 0) Setting condition (RELD = 1)
When bus release signal (REL) is detected
1
CMDD
When transfer start instruction is executed
2 When bus release signal (REL) is detected
3 When RESET signal is input
Clearing condition (CMDD = 0) Setting condition (CMDD = 1)
When command signal (CMD) is detected
4 CTXE = CRXE = 0