LTC3882-1
54
Rev A
For more information
APPLICATIONS INFORMATION
output filter capacitance for some allowed output voltage
variation over the anticipated load range. An example of
AVP is shown in Figure 37. Refer to LTC Design Solution
10 for additional examples of using AVP to advantage.
MFR_VOUT_AVP specifies the percent reduction in pro-
grammed V
OUT
from no load at an output current value
equal to IOUT_WARN_LIMIT. LTC3882-1 AVP supports
a maximum reduction in V
OUT
of 15%, corresponding
to a ±7.5% tolerance about a nominal output voltage at
roughly 50% load. In order to effectively use AVP, apply
the following steps.
1. Set IOUT_OC_WARN_LIMIT. This specifies the master
phase output current at which the programmed AVP
level will apply. Generally this is above the 100% load
point to avoid spurious warnings at full load.
2. VOUT_COMMAND should be set to the value of V
OUT
de-
sired with no load on the output. VOUT_MARGIN_HIGH/
LOW also specify no-load values when AVP is enabled.
AVP on the LTC3882-1 can only reduce the output from
these levels.
downstream rails. Due to this, cascade sequencing should
not be implemented without an external fast supervisor
to monitor downstream rails and assert a system fault if
problems occur.
Using Output Voltage Servo
For best output voltage accuracy, enable digital
servo mode on the master phase by setting bit 6 of
MFR_PWM_MODE_LTC3882-1. In digital servo mode,
the LTC3882-1 will adjust the regulated output voltage
based on its related ADC voltage reading. Every 90ms the
digital servo loop will step the LSB of the DAC (nominally
1.375mV or 0.6875mV depending on the voltage range
bit) until the output is at the correct ADC reading.
When the master channel is turned on, digital servo is
enabled after all of the following conditions are satisfied.
• MFR_PWM_MODE_LTC3882-1 Bit 6 Is Set
• The TON_RISE Sequence Is Complete
• A VOUT_UV_FAULT Is Not Present
• An IOUT_OC_FAULT Is Not Present
• MFR_AVP = 0%
Digital servo mode then engages after TON_MAX_
FAULT_LIMIT has expired as shown in Figure 29, unless
that limit is set to 0s (infinite). In that case, the mode is
engaged as soon as the above conditions are satisfied.
Using AVP
The LTC3882-1 features digitally programmable active
voltage positioning (AVP), where output voltage set point
is automatically adjusted as a function of output current at
the full bandwidth of the converter. AVP normally entails
specifying an output load line for a voltage mode switcher to
allow current sharing between master phases connected in
parallel. While AVP can be used to this effect in LTC3882-1
applications, use of the LTC3882-1 I
AVG
current sharing
control loop is recommended instead. This will produce
more accurate sharing across a wider number of phases
without degrading supply output impedance.
However, AVP can still be used to great benefit in LTC3882-1
applications. AVP can be applied to minimize the size of
Figure 37. Active Voltage Positioning
38821 F37
WITH AVP
AVP DISABLED
I
O
(10A/DIV)
V
OUT
(50mV/DIV)
I
O
(10A/DIV)
LOOP: BW = 118kHz, PM = 58°, GM = 7dB
V
OUT
(50mV/DIV)
108mV
173mV
