LTC3882-1
47
Rev A
APPLICATIONS INFORMATION
f
C
=
crossover frequency =
f
PWM
10
f
Z1(ERR)
=
f
LC
=
1
2
π
R2C1
f
Z2(RES)
=
f
C
5
=
1
2
π
(R1
+
R3)C3
f
P1(ERR)
=
f
ESR
=
1
2
π
R2(C1//C2)
f
P2(RES)
=
5f
C
=
1
2
π
R3C3
Required error amplifier gain at frequency f
C
is:
≈
40log 1
+
f
C
f
LC
⎛
⎝⎜
⎞
⎠⎟
2
– 20log 1
+
f
C
f
ESR
⎛
⎝⎜
⎞
⎠⎟
2
– 15.56
Once the value of resistor R1 (function of selected V
OUT
range) and pole/zero locations have been decided, the
value of R2, C1, C2, R3 and C3 can be obtained from the
previous equations.
Compensating a switching power supply feedback loop is
a complex task. The applications shown in this data sheet
provide typical values, optimized for the power components
shown. Though similar power components should suffice,
substantially changing even one major power component
may degrade performance significantly. Stability also may
depend on circuit board layout. To verify the calculated
component values, all new circuit designs should be
prototyped and tested for stability.
The
software tool can be used as a guide
through the entire power supply design process, includ-
ing optimization of circuit component values according to
system requirements.
PCB Layout Considerations
To prevent magnetic and electrical field radiation or high
frequency resonant problems and to ensure correct IC
operation, proper layout of the components connected
to the LTC3882-1 is essential. Refer to Figure 24, which
also illustrates current waveforms typically present in the
circuit branches. R
SENSE
will be replaced with a dead short
if DCR sensing is used. For maximum efficiency, the switch
The external inductor/output capacitor combination makes
a more significant contribution to loop behavior. These
components cause a 2nd order amplitude roll-off that filters
the PWM waveform, resulting in the desired DC output
voltage. But the additional 180° phase shift produced by
this filter causes stability issues in the feedback loop and
must be frequency compensated. At higher frequencies,
the reactance of the output capacitor will approach its
ESR, and the roll-off due to the capacitor will stop, leaving
–20dB/decade and 90° of phase shift.
The transfer function of the Type 3 circuit shown in
Figure 22 is given by the following equation:
V
COMP
V
OUT
=
–(1
+
sC1R2)[1
+
s(R1
+
R3)C3]
sR1(C1
+
C2)[1
+
s(C1//C2)R2](1
+
sC3R3)
The RC network across the error amplifier and the feed-
forward components R3 and C3 introduce two pole-zero
pairs to obtain a phase boost at the system unity-gain
(crossover) frequency, f
C
. In theory, the zeros and poles are
placed symmetrically around f
C
, and the spread between the
zeros and the poles is adjusted to give the desired phase
boost at f
C
. However, in practice, if the crossover frequency
is much higher than the LC double-pole frequency, this
method of frequency compensation normally generates
a phase dip within the unity bandwidth and creates some
concern regarding conditional stability.
If conditional stability is a concern, move the error ampli-
fier zero to a lower frequency to avoid excessive phase
dip. The following equations can be used to compute the
feedback compensation component values:
f
LC
=
1
2
π
LC
OUT
f
ESR
=
1
2
π
R
ESR
C
OUT
choose:
