8XC196L
X SUPPLEMENT
3-2
3.2
REGISTER FILE
Figure 3-1 compares the register file addresses of the 8XC196Lx and 8XC196Kx. The register
file in Figure 3-1 is divided into an upper register file and a lower register file. The upper register
file consists of general-purpose register RAM. The lower register file contains general-purpose
register RAM along with the stack pointer (SP) and the CPU special-function registers (SFRs).
Table 3-2 lists the register file memory addresses. The RALU accesses the lower register file di-
rectly, without the use of the memory controller. It also accesses a windowed location directly
(see “Windowing” on page 3-6). The upper register file and the peripheral SFRs can be win-
dowed. Registers in the lower register file and registers being windowed can be accessed with
register-direct addressing.
NOTE
The register file must not contain code. An attempt to execute an instruction
from a location in the register file causes the memory controller to fetch the
instruction from external memory.
1BFF
0500
1BFF
0500
1BFF
0600
—
1BFF
0600
1BFF
0600
External device (memory
or I/O) connected to
address/data bus
Indirect or
indexed
04FF
0400
04FF
0400
—
—
05FF
0400
05FF
0400
Internal code or data RAM
Indirect or
indexed
—
03FF
0200
05FF
0180
—
—
—
External device (memory
or I/O) connected to
address/data bus
Indirect or
indexed
03FF
0100
01FF
0100
017F
0100
02FF
0100
03FF
0100
03FF
0100
Upper register file
(general-purpose register
RAM)
Indirect,
indexed, or
windowed
direct
00FF
0000
00FF
0000
00FF
0000
00FF
0000
00FF
0000
00FF
0000
Lower register file
(register RAM, stack
pointer, and CPU SFRs)
Direct,
indirect, or
indexed
Table 3-1. Address Map (Continued)
Device and Hex Address Range
Description
Addressing
Modes
CA
JR, KR
LD
L
A
, LB
JT
, KT
JV
NOTES:
1.
After a reset, the device fetches its first instruction from 2080H.
2.
The content or function of these locations may change in future device revisions, in which case
a program that relies on a location in this range might not function properly.
Summary of Contents for 87C196CA
Page 9: ...1 Guide to This Manual...
Page 10: ......
Page 13: ...2 Architectural Overview...
Page 14: ......
Page 22: ......
Page 23: ...3 Address Space...
Page 24: ......
Page 33: ...4 Standard and PTS Interrupts...
Page 34: ......
Page 43: ...5 I O Ports...
Page 44: ......
Page 51: ...6 Synchronous Serial I O Port...
Page 52: ......
Page 56: ......
Page 57: ...7 Event Processor Array...
Page 58: ......
Page 65: ...8 J1850 Communications Controller...
Page 66: ......
Page 89: ...9 Minimum Hardware Considerations...
Page 90: ......
Page 93: ...10 Special Operating Modes...
Page 94: ......
Page 98: ......
Page 99: ...11 Programming the Nonvolatile Memory...
Page 100: ......
Page 106: ......
Page 107: ...A Signal Descriptions...
Page 108: ......
Page 118: ......
Page 119: ...Glossary...
Page 120: ......
Page 133: ...Index...
Page 134: ......