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10-1
CHAPTER 10
SPECIAL OPERATING MODES
The 8XC196Lx’s idle and powerdown modes are the same as those of the 8XC196Kx. However,
the clock circuitry has changed, and the on-circuit emulation (ONCE) special-purpose mode op-
eration has changed slightly because of the new reset state pin levels that have been implemented.
10.1 INTERNAL TIMING
The 87C196LA and LB clock circuitry (Figure 10-1) implements a phase-locked loop and clock
multiplier circuitry, which can substantially increase the CPU clock rate while using a lower-fre-
quency input clock.
Summary of Contents for 87C196CA
Page 9: ...1 Guide to This Manual...
Page 10: ......
Page 13: ...2 Architectural Overview...
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Page 22: ......
Page 23: ...3 Address Space...
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Page 33: ...4 Standard and PTS Interrupts...
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Page 43: ...5 I O Ports...
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Page 51: ...6 Synchronous Serial I O Port...
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Page 57: ...7 Event Processor Array...
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Page 65: ...8 J1850 Communications Controller...
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Page 89: ...9 Minimum Hardware Considerations...
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Page 93: ...10 Special Operating Modes...
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Page 99: ...11 Programming the Nonvolatile Memory...
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Page 106: ......
Page 107: ...A Signal Descriptions...
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Page 118: ......
Page 119: ...Glossary...
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Page 133: ...Index...
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