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8XC196L
X SUPPLEMENT
A-8
Table A-5. 87C196LA, LB Default Signal Conditions
Port
Signals
Alternate
Functions
During RESET#
Active
Upon RESET#
Inactive
(Note 6)
Idle
Power-
down
P0.7:2
ACH7:2
HiZ
HiZ
HiZ
HiZ
P1.0
EPA0/T2CLK
WK0
WK0
(Note 1)
(Note 1)
P1.1
EPA1
WK0
WK0
(Note 1)
(Note 1)
P1.2
EPA2/T2DIR
WK0
WK0
(Note 1)
(Note 1)
P1.3
EPA3
WK0
WK0
(Note 1)
(Note 1)
P2.0
TXD
WK0
WK0
(Note 1)
(Note 1)
P2.1
RXD
WK0
WK0
(Note 1)
(Note 1)
P2.2
EXTINT
WK0
WK0
(Note 1)
(Note 1)
P2.4
RXJ1850 (LB only)
WK0
WK0
(Note 1)
(Note 1)
P2.6
ONCE/TXJ1850 (LB only)
MD0
MD0
(Note 1)
(Note 1)
P2.7
CLKOUT
CLKOUT active,
LoZ0/1
CLKOUT active,
LoZ0/1
(Note 1)
(Note 2)
P3.7:0
AD7:0
WK0
HiZ
(Note 4)
(Note 4)
P4.7:0
AD15:8
WK0
HiZ
(Note 4)
(Note 4)
P5.0
ALE/ADV#
WK0
WK0
(Note 1)
(Note 1)
P5.2
WR#/WRL#
WK0
WK0
(Note 1)
(Note 1)
P5.3
RD#
WK0
WK0
(Note 1)
(Note 1)
P6.0
EPA8/COMP0
WK0
WK0
(Note 1)
(Note 1)
P6.1
EPA9/COMP1
WK0
WK0
(Note 1)
(Note 1)
P6.4
SC0
WK0
WK0
(Note 1)
(Note 1)
P6.5
SD0
WK0
WK0
(Note 1)
(Note 1)
P6.6
SC1
WK0
WK0
(Note 1)
(Note 1)
P6.7
SD1
WK0
WK0
(Note 1)
(Note 1)
—
EA#
WK1 (Note 5)
WK1
WK1
WK1
—
RESET#
LoZ0
MD1
MD1
MD1
—
V
PP
HiZ
HiZ
LoZ1
LoZ1
—
XTAL1
Osc input, HiZ
Osc input, HiZ
Osc input,
HiZ
Osc input,
HiZ
—
XTAL2
Osc output,
LoZ0/1
Osc output,
LoZ0/1
Osc output,
LoZ0/1
(Note 3)
NOTES:
1.
If P
x_MODE.y = 0, port is as programmed.
If P
x_MODE.y = 1, pin is as specified by Px_DIR and the associated peripheral.
2.
If P2_MODE.7 = 0, pin is as programmed. If P2_MODE.7 = 1, pin is LoZ0.
3.
If XTAL1 = 0, pin is LoZ1. If XTAL1 = 1, pin is LoZ0.
4.
If EA# = 0, port is HiZ. If EA# = 1, port is open-drain I/O.
5.
Although EA# is weakly pulled high, do not allow it to float. Always tie EA# to V
CC
if it is not connected
to an external device.
6.
The values in this column are valid until your software writes to P
x_MODE.
Summary of Contents for 87C196CA
Page 9: ...1 Guide to This Manual...
Page 10: ......
Page 13: ...2 Architectural Overview...
Page 14: ......
Page 22: ......
Page 23: ...3 Address Space...
Page 24: ......
Page 33: ...4 Standard and PTS Interrupts...
Page 34: ......
Page 43: ...5 I O Ports...
Page 44: ......
Page 51: ...6 Synchronous Serial I O Port...
Page 52: ......
Page 56: ......
Page 57: ...7 Event Processor Array...
Page 58: ......
Page 65: ...8 J1850 Communications Controller...
Page 66: ......
Page 89: ...9 Minimum Hardware Considerations...
Page 90: ......
Page 93: ...10 Special Operating Modes...
Page 94: ......
Page 98: ......
Page 99: ...11 Programming the Nonvolatile Memory...
Page 100: ......
Page 106: ......
Page 107: ...A Signal Descriptions...
Page 108: ......
Page 118: ......
Page 119: ...Glossary...
Page 120: ......
Page 133: ...Index...
Page 134: ......