11-3
PROGRAMMING THE NONVOLATILE MEMORY
Figure 11-1. Slave Programming Circuit
Table 11-3. Slave Programming Mode Address Map
Description
Address
Comments
OTPROM
2000–7FFFH
OTPROM Cells
OFD
0778H
OTPROM Cell
DED
†
0758H
UPROM Cell
DEI
†
0718H
UPROM Cell
PCCB
0218H
Test EPROM
Programming V
CC
0072H
Read Only
Programming V
PP
0073H
Read Only
Signature word
0070H
Read Only
†
These bits program the UPROM cells. Once these bits are programmed, they cannot be erased, and
dynamic failure analysis of the device is impossible.
P2.6
P2.4
P2.2
P2.1
P2.0
P0.7/PMODE.3
P0.6/PMODE.2
P0.5/PMODE.1
P0.4/PMODE.0
ANGND
EA#
XTAL1
0.1 µF
RESET#
CLOCK
EA#
Pullups Required
P4.7 - P3.0
87C196LA, LB
RESET#
10
k
Ω
V
CC
V
CC
V
PP
V
CC
A5277-01
V
REF
V
CC
V
SS
P3.7:0
P4.7:0
PBUS
V
PP
CPVER
AINC#
PROG#
PALE#
PVER
Summary of Contents for 87C196CA
Page 9: ...1 Guide to This Manual...
Page 10: ......
Page 13: ...2 Architectural Overview...
Page 14: ......
Page 22: ......
Page 23: ...3 Address Space...
Page 24: ......
Page 33: ...4 Standard and PTS Interrupts...
Page 34: ......
Page 43: ...5 I O Ports...
Page 44: ......
Page 51: ...6 Synchronous Serial I O Port...
Page 52: ......
Page 56: ......
Page 57: ...7 Event Processor Array...
Page 58: ......
Page 65: ...8 J1850 Communications Controller...
Page 66: ......
Page 89: ...9 Minimum Hardware Considerations...
Page 90: ......
Page 93: ...10 Special Operating Modes...
Page 94: ......
Page 98: ......
Page 99: ...11 Programming the Nonvolatile Memory...
Page 100: ......
Page 106: ......
Page 107: ...A Signal Descriptions...
Page 108: ......
Page 118: ......
Page 119: ...Glossary...
Page 120: ......
Page 133: ...Index...
Page 134: ......