Intel 87C196CA, Supplement To User’S Manual

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Glossary-5
GLOSSARY
internal address The 24-bit address that the microcontroller generates.
See also external address.
interrupt controller The module responsible for handling interrupts that
are to be serviced by interrupt service routines that
you provide. Also called the programmable interrupt
controller (PIC).
interrupt latency The total delay between the time that an interrupt is
generated (not acknowledged) and the time that the
microcontroller begins executing the interrupt service
routine or PTS routine. Determine the instruction in
your code that has the longest execution time and use
that execution time in calculating interrupt latency.
interrupt service routine A software routine that you provide to service a
standard interrupt request.
interrupt vector A location in special-purpose memory that holds the
starting address of an interrupt service routine.
J1850 An integrated communications controller peripheral
that supports the 10.4 Kb/s variable pulse-width
(VPW) medium-speed, class B, in-vehicle network
protocol.
ISR See interrupt service routine.
linearity errors See differential nonlinearity and nonlinearity.
LONG-INTEGER A 32-bit, signed variable with values from –2
31
t2
31
–1.
LSB 1) Least-significant bit of a byte or least-significant
byte of a word.
2) In an A/D converter, the reference voltage divided
by 2
n
, where n is the number of bits to be converted.
For a 10-bit converter with a reference voltage of 5.12
volts, one LSB is equal to 5.0 millivolts (5.12
÷
2
10
).
LSW Least-significant word of a double-word or quad-
word.