Infineon Technologies C166S V2, User Manual

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User Manual
C166S V2
Detailed Instruction Description
User Manual 8-417 V 1.7, 2001-01
8.3 Instructions for OCDS/ITC injection and System Control
The following table gives a brief overview of the instructions that are defined especially
for injections via the Interrupt and PEC controller and for debugging reasons by the
OCDS. All instruction are 32 bit wide and overlap the existing instruction set. All these
instructuions are not modifying the PSW except direct writes to the PSW and the ITRAP/
ITRAPS instruction that adjust the level inside the PSW. All these instructions are only
available for injection.
operand symbol size comment
mem24 MM
2
MM
0
MM
1
24 direct 24 bit address for memory access.
The format MM
2
MM
0
MM
1
means that the 24
bit address (byte2,byte1,byte0) has to be
presented in the order byte2, byte0, byte1.
#addr23 aa aa a:aaa 23 direct 23bit (to be LSB extended by zero) for
program access.
#banksel2 ss 2 selection of local/global banks
00 global register bank
10 local register bank 1
11 local register bank 2
01 reserved
#data23 dd dd d:ddd 23 direct 23bit (to be LSB extended by zero) data
to be written to CSP/IP.
Rx x 4 word GPR address
Rbx x 4 byte GPR address
Table 8-1 Used shortcuts
Mnemonic Operands Opcode Cycle Comment
OLOAD mem24 0D MM
2
MM
0
MM
1
1 reads word from
memory and
writes to OCDS
OSTORE mem24 1D MM
2
MM
0
MM
1
1 reads word from
OCDS and writes
to memory
Table 8-2 Instructions for Injection only