Infineon Technologies C166S V2, User Manual

Page: 162 / 439

User Manual
C166S V2
External Bus Controller
User Manual 6-162 V 1.7, 2001-01
Field Bits Typ Description
0 15 r Reserved
The software always reads a ’0’. Although this bit is
read only, the software should always write a ’0’ in
case of a write access.
WRPHF [14:13] rw Write Phase F
00 0 clock cycles
...
11 3 clock cycles
RDPHF [12:11] rw Read Phase F
00 0 clock cycles
...
11 3 clock cycles
PHE [10:6] rw Phase E
00000 1 clock cycle
...
11111 32 clock cycles
PHD 5 rw Phase D
0 0 clock cycles
1 1 clock cycle
PHC [4:3] rw Phase C
00 0 clock cycles
...
11 3 clock cycles
PHB 2 rw Phase B
0 1 clock cycle
1 2 clock cycles
PHA [1:0] rw Phase A
00 0 clock cycles
...
11 3 clock cycles