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8. Maintenance, Checkout, and Calibration
8.10. FIM Self-Test Diagnostic Codes
R400
Experion PKS Series A Fieldbus Interface Module User's Guide
353
July 2010
Honeywell
Test Code
Target Device(s)
Failure Modes
Function
correctly. Only uses the memory
test area, so just shows that the
data cache is enabled and at least
partially functional.
T056
CPU D-Cache
Burst RAM Wrap
Test
CPU, RAM, UPMB
Verify that the RAM burst wraps
on address modulus 4. Perform on
both RAM chips. Only uses the
memory test area.
T057
CPU D-Cache
Integrity Test
CPU
The checksum of the boot code is
repeated with Data Cache
enabled. The test is timed. If the
data cache is not working
properly, the checksum will fail or
the test will take too long.
Hardware Status Register and System Control Diagnostics
T060
WDT Pending Test
CPU, PLD
Verifies that the watch dog timer
timeout pending signal is not
asserted.
T061
DC_FAIL Pending
Test
CPU, PLD
Verifies that the backplane
DC_FAIL pending signal is not
asserted.
T062
Struck IRQ0 Test
CPU, PLD, pullup
Verifies the IRQ0 is not asserted.
If it is asserted, fails in this test, if
WDT Pending and DC_FAIL
Pending are not asserted.
T063
Stuck ICP Timer
Interrupt Test
CPU, PLD, pullup,
ICP ASIC
Verifies that the ICP timer interrupt
IRQ2 is not asserted.
T064
Stuck ICP Comm
Interrupt Test
CPU, PLD, pullup,
ICP ASIC
Verifies that the ICP comm.
Interrupt IRQ3 is not asserted.
T065
SYS_FAIL Assert
Test
CPU, PLD,
Backplane, other
modules
Verifies that SYS_FAIL status is
not stuck . This means it is not
asserted for longer than a to be
determined period necessary to
accommodate other modules'
tests.
T068
Stuck IRQ7
CPU, PLD
Verifies that interrupt from
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