Hioki RM3542, Instruction Manual, Page: 130 / 218

9.7 Message Reference
124
(3) Synchronization Commands
(4) Status and Event Control Commands
Set the OPC bit of SESR When Finished All Pending Operations
Syntax Command

OPC
Description Sets OPC bit 0 of the Standard Event Status Register (SESR) when all prior commands have
finished processing.
Respond with ASCII “1” When Finished All Pending Operations
Syntax Query
Response

OPC?
1
Description Responds with ASCII “1” when all prior commands have finished processing.
Wait for Pending Commands to Finish
Syntax Command

WAI
Description The instrument waits until all prior commands finish before executing any subsequent commands.
Note The

WAI
command is supported because it is defined in IEEE 488.2-1987, but because all Model
RM3542 device-specific commands are sequential types, this command has no actual affect.
Clear the Status Byte and Related Queues (Except the Output Queue)
Syntax Command

CLS
Description Clears the event status registers. The Status Byte Register bits corresponding to the event status
registers are also cleared. (SESR, SR0, ESR1)
Note
The output queue is unaffected.
The output queue, the various enable registers and MAV bit 4 of the
Status Byte Register are unaffected.