GD32E23x User Manual
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Select external clock bypass mode by setting the LXTALBPS and LXTALEN bits in the
backup domain control r2egister(RCU_BDCTL). The CK_LXTAL is equal to the external
clock which drives the OSC32IN pin.
Internal 40 KHz RC Oscillator (IRC40K)
The internal 40 KHz RC Oscillator has a frequency of about 40 kHz and is a low power clock
source for the real time clock circuit or the free watchdog timer. The IRC40K offers a low cost
clock source as no external components are required. The IRC40K RC oscillator can be
switched on or off by using the IRC40KEN bit in the reset source/clock register,
RCU_RSTSCK. The IRC40KSTB flag in the reset source/clock register RCU_RSTSCK will
indicate if the IRC40K clock is stable. An interrupt can be generated if the related interrupt
enable bit IRC40KSTBIE in the interrupt register RCU_INT is set when the IRC40K becomes
stable.
System Clock (CK_SYS) Selection
After the system reset, the default CK_SYS source will be IRC8M and can be switched to
HXTAL or PLL by changing the system clock switch bits, SCS, in the configuration register 0,
RCU_CFG0. When the SCS value is changed, the CK_SYS will continue to operate using
the original clock source until the target clock source is stable. When a clock source is used
directly by the CK_SYS or the PLL, it is not possible to stop it.
HXTAL Clock Monitor (CKM)
The HXTAL clock monitor function is enabled by the HXTAL clock monitor enable bit,
CKMEN, in the control register 0, RCU_CTL0. This function should be enabled after the
HXTAL start-up delay and disabled when the HXTAL is stopped. Once the HXTAL failure is
detected, the HXTAL will be automatically disabled. The HXTAL clock stuck flag, CKMIF, in
the Interrupt register, RCU_INT, will be set and the HXTAL failure event will be generated.
This failure interrupt is connected to the Non-Maskable Interrupt, NMI, of the Cortex-M23. If
the HXTAL is selected as the clock source of CK_SYS or PLL, the HXTAL failure will force
the CK_SYS source to IRC8M and the PLL will be disabled automatically
Clock Output Capability
The clock output capability is ranging from 32 kHz to 72 MHz. There are several clock
signals can be selected via the CK_OUT clock source selection bits, CKOUTSEL, in the
configuration register 0 (RCU_CFG0). The corresponding GPIO pin should be configured in
the properly alternate function I/O (AFIO) mode to output the selected clock signal.
Table 4-1. Clock source select
Clock Source Selection bits
Clock Source
000
No Clock
001
CK_IRC28M
010
CK_IRC40K
011
CK_LXTAL
100
CK_SYS
