SYS68K/CPU-39 USER'S MANUAL
FORCE COMPUTERS
I-2
I.1.1 Acquire the RAM port
The OPEN command requests the establishment of a logical connection between an application and
the RAM port; the appropriate Command Control Buffer is structured as presented in
Figure 1.
Whenever an OPEN command is issued through the Application Command Interface to 'open' the RAM
port, the Management Entity verifies whether the RAM port is still available and in this case it takes
possession of the RAM port. If the RAM port is already owned by another application, the attempt to
acquire the RAM port is refused by the Management Entity.
struct _ccb_open_command
{
unsigned long
_access_control_flags;
unsigned long
_reserved_for_ME_purpose[ 10 ];
unsigned long
command;
unsigned long
logical_device_code;
unsigned long
inquiry_mode;
unsigned long
response_mode;
unsigned long
data_exchange_mode;
unsigned long
application_address;
unsigned long
_remnant[ 47 ];
};
Figure 1: Structure of the CCB used to gain RAM port ownership
The OPEN Command is to execute as described in the Application Command Interface Programming
Guide.
logical_device_code:
Because the RAM port is permanently available through the ACI, the major and minor device number
of the RAM port are always the same: both the major device number of $0 and the minor device
number -4 ($FC) specify the RAM port. (The Management Entity keeps track of the major device
numbers of all devices available on present EAGLE modules; and due to the fact that the RAM port
is managed by the ME directly and because it is permanently available through the ACI independent
of the presence of any EAGLE module, the ME orders the RAM port at the beginning of its internal
device list. Therefore, the major device number assigned to the RAM port by the ME is $0 and the
minor device number -4 denotes the proper RAM port.)
Summary of Contents for SYS68K/CPU-40
Page 2: ...INTRODUCTION...
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Page 8: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 1 2 Figure 1 1 Photo of the CPU Board...
Page 9: ...SECTION 1 INTRODUCTION 1 3 Figure 1 2 Block Diagram of the CPU Board...
Page 34: ...SECTION 1 INTRODUCTION 2 21 Figure 2 2 The Front Panel of the CPU Board...
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Page 42: ...INSTALLATION...
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Page 57: ...HARDWARE USER S MANUAL...
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Page 83: ...SECTION 3 HARDWARE USER S MANUAL 3 13 Figure 3 2 Location Diagram of the System EPROM Area...
Page 92: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 3 22 3 5 6 Location Diagram of Jumperfield B16...
Page 141: ...SECTION 3 HARDWARE USER S MANUAL 3 71 Figure 3 25 Location Diagram of Header B12...
Page 152: ...SECTION 3 HARDWARE USER S MANUAL 4 3 Figure 4 1 Front Panel of the CPU Board...
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Page 172: ...SECTION 3 HARDWARE USER S MANUAL 6 17 Figure 6 2 Location Diagram of Jumperfield B19...
Page 179: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 6 24 Figure 6 4 Location Diagram of B13...
Page 187: ...APPENDIX TO THE HARDWARE USER S MANUAL...
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Page 207: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 3 E 1 Circuit Schematics of DRM 01...
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Page 209: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 5 E 2 Circuit Schematics of SRM 01...
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Page 213: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL F 3 Location Diagram for All Jumperfields...
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Page 226: ...SYS68K CPU 40 41 FORCE COMPUTERS I 2 This page was intentionally left blank...
Page 228: ...COPIES OF DATA SHEETS...
Page 229: ...COPIES OF DATA SHEETS RTC 72423 DUSCC 68562 PI T 68230...
Page 230: ...USERS NOTES...
Page 231: ...USERS NOTES...
Page 232: ...USERS NOTES...
Page 233: ...OPTIONS APPLICATIONS MODIFICATIONS...
Page 234: ...INTRODUCTION TO VMEPROM IN USE WITH THE SYS68K CPU 40 41...
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Page 268: ...APPENDIX TO THE INTRODUCTION TO VMEPROM...
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Page 319: ...THE APPLICATION COMMAND INTERFACE PROGRAMMING GUIDE...