SYS68K/CPU-40/41 USER'S MANUAL
FORCE COMPUTERS
3-24
All combinations of the listed instructions are allowed and possible.
This SRAM can be used to save special settings of the FGA-002 as described in
Section 7, Introduction
to VMEPROM of this manual.
The following figure shows the location diagram of Jumperfield B20 for the backup supply. The default
configuration uses the on board battery.
Please note that the Real Time Clock on the CPU board is supplied via the same jumperfield.
B1 B1
+))),
+))),
1
*
o
*
Battery is connected to 1
*
o
*
Battery is cut from
*
|
*
Backup Supply Line
*
*
Backup Supply Line
*
o
*
(default)
*
o
*
.)))-
.)))-
B20 B20
+))),
+))),
1
*
o
*
+5VSTDBY is connected to 1
*
o
*
+5VSTDBY is cut from
*
|
*
Backup Supply Line
*
*
Backup Supply Line
*
o
*
*
o
*
(default)
.)))-
.)))-
NOTE
The battery is not installed on the CPU board to avoid damage during shipment.
CAUTION
If the special settings for the FGA-002 which are stored in the SRAM are used, these settings will be
erased when
a)
removing the jumper on jumperfield B1 or disassembling the battery
and
b)
removing the jumper on jumperfield B20 or removing the board from the VMEbus.
Summary of Contents for SYS68K/CPU-40
Page 2: ...INTRODUCTION...
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Page 8: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 1 2 Figure 1 1 Photo of the CPU Board...
Page 9: ...SECTION 1 INTRODUCTION 1 3 Figure 1 2 Block Diagram of the CPU Board...
Page 34: ...SECTION 1 INTRODUCTION 2 21 Figure 2 2 The Front Panel of the CPU Board...
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Page 37: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 3 2 This page intentionally left blank...
Page 42: ...INSTALLATION...
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Page 57: ...HARDWARE USER S MANUAL...
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Page 83: ...SECTION 3 HARDWARE USER S MANUAL 3 13 Figure 3 2 Location Diagram of the System EPROM Area...
Page 92: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 3 22 3 5 6 Location Diagram of Jumperfield B16...
Page 141: ...SECTION 3 HARDWARE USER S MANUAL 3 71 Figure 3 25 Location Diagram of Header B12...
Page 152: ...SECTION 3 HARDWARE USER S MANUAL 4 3 Figure 4 1 Front Panel of the CPU Board...
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Page 172: ...SECTION 3 HARDWARE USER S MANUAL 6 17 Figure 6 2 Location Diagram of Jumperfield B19...
Page 179: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 6 24 Figure 6 4 Location Diagram of B13...
Page 187: ...APPENDIX TO THE HARDWARE USER S MANUAL...
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Page 207: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 3 E 1 Circuit Schematics of DRM 01...
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Page 209: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 5 E 2 Circuit Schematics of SRM 01...
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Page 213: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL F 3 Location Diagram for All Jumperfields...
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Page 226: ...SYS68K CPU 40 41 FORCE COMPUTERS I 2 This page was intentionally left blank...
Page 228: ...COPIES OF DATA SHEETS...
Page 229: ...COPIES OF DATA SHEETS RTC 72423 DUSCC 68562 PI T 68230...
Page 230: ...USERS NOTES...
Page 231: ...USERS NOTES...
Page 232: ...USERS NOTES...
Page 233: ...OPTIONS APPLICATIONS MODIFICATIONS...
Page 234: ...INTRODUCTION TO VMEPROM IN USE WITH THE SYS68K CPU 40 41...
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Page 268: ...APPENDIX TO THE INTRODUCTION TO VMEPROM...
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Page 319: ...THE APPLICATION COMMAND INTERFACE PROGRAMMING GUIDE...