SECTION 1
INTRODUCTION
2-5
2.2.3 The SRM-01/4
The SRM-01/4 is a 4 Mbyte RAM module which is used on the CPU-41B/4.
Features of the SRM-01/4
!
4 Mbyte SRAM
!
Burst READ and Burst WRITE capability
!
Battery Backup via VMEbus
!
Accessible via VMEbus
The access address for the 68040 is $00000000 to $003FFFFF.
The access address for the VMEbus is programmable in 4 Kbyte steps through the FGA-002. The defined
memory range can be write protected in coordination with the address modifier codes. For example, in
supervisor mode the memory can be read and written, in user mode memory can only be read.
Parity check is not necessary for SRAM devices, because these components are protected against soft
errors owing alpha emission. The following chart lists the required CPU clock cycles and wait states for
accessing the shared RAM.
Board
68040 Clock
No. of CPU Clock
No. of CPU Clock
No. of Wait
No. of Wait
Type
Frequency
Cycles Counted
Cycles for
States for
States for
From TS to TA
Burst Cycles
Normal Cycles
Burst Cycles
for Normal Cycles
CPU-41/B
25 MHz
3
1
2
0
Summary of Contents for SYS68K/CPU-40
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Page 8: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 1 2 Figure 1 1 Photo of the CPU Board...
Page 9: ...SECTION 1 INTRODUCTION 1 3 Figure 1 2 Block Diagram of the CPU Board...
Page 34: ...SECTION 1 INTRODUCTION 2 21 Figure 2 2 The Front Panel of the CPU Board...
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Page 42: ...INSTALLATION...
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Page 57: ...HARDWARE USER S MANUAL...
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Page 83: ...SECTION 3 HARDWARE USER S MANUAL 3 13 Figure 3 2 Location Diagram of the System EPROM Area...
Page 92: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 3 22 3 5 6 Location Diagram of Jumperfield B16...
Page 141: ...SECTION 3 HARDWARE USER S MANUAL 3 71 Figure 3 25 Location Diagram of Header B12...
Page 152: ...SECTION 3 HARDWARE USER S MANUAL 4 3 Figure 4 1 Front Panel of the CPU Board...
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Page 172: ...SECTION 3 HARDWARE USER S MANUAL 6 17 Figure 6 2 Location Diagram of Jumperfield B19...
Page 179: ...SYS68K CPU 40 41 USER S MANUAL FORCE COMPUTERS 6 24 Figure 6 4 Location Diagram of B13...
Page 187: ...APPENDIX TO THE HARDWARE USER S MANUAL...
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Page 207: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 3 E 1 Circuit Schematics of DRM 01...
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Page 209: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL E 5 E 2 Circuit Schematics of SRM 01...
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Page 213: ...SECTION 4 APPENDIX TO THE HARDWARE USER S MANUAL F 3 Location Diagram for All Jumperfields...
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Page 228: ...COPIES OF DATA SHEETS...
Page 229: ...COPIES OF DATA SHEETS RTC 72423 DUSCC 68562 PI T 68230...
Page 230: ...USERS NOTES...
Page 231: ...USERS NOTES...
Page 232: ...USERS NOTES...
Page 233: ...OPTIONS APPLICATIONS MODIFICATIONS...
Page 234: ...INTRODUCTION TO VMEPROM IN USE WITH THE SYS68K CPU 40 41...
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Page 268: ...APPENDIX TO THE INTRODUCTION TO VMEPROM...
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Page 319: ...THE APPLICATION COMMAND INTERFACE PROGRAMMING GUIDE...