Force Computers SYS68K/CPU-40, User Manual

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SYS68K/CPU-40/41 USER'S MANUAL FORCE COMPUTERS
2-8
2.7 The FGA-002
One of the main features on this CPU board is the FGA-002 Gate Array with 24,000 gates and 281 pins.
The FGA-002 controls the local bus and builds the VMEbus interface. It also includes a DMA controller,
a complete interrupt handler, message broadcast interface (FMB), timer functions, mailbox locations, and
a VMEbus interrupter. This gate array monitors the local bus, which in turn signifies that if any local I/O
device is to be accessed, the gate array overrules all control signals, used address signals, and data
signals.
The FGA-002 serves as a VMEbus manager. All VMEbus address and data lines are connected to the
gate array through the buffers. Additional functions such as the VMEbus interrupt handler are also installed
on the FGA-002. The on-chip DMA controller can access the local memory, VMEbus memory, and on-
board devices which are able to function in a DMA mode. The start address of the FGA-002 registers is
$FFD00000. All registers of the gate array and associated functions are described in detail in the FGA-002
Users Manual. On the following page you will find a list of features for the FGA-002.
Features of the FGA-002
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32 bit DMA Controller
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2 Message Broadcast Channels (FMB)
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8 Mailbox Interrupt Channels
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One 8 bit timer
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Complete Interrupt Management for VMEbus interrupts, ACFAIL, SYSFAIL, Onboard Interrupts and
FGA-002 internal interrupts
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VMEbus interface including a single level arbiter
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Decoding logic for accesses to the Shared Memory of the CPU board
A complete functional description of the FGA-002 may be found in the FGA-002 Users Manual.