Force Computers SYS68K/CPU-40, User Manual

Page: 82 / 372

SYS68K/CPU-40/41 USER'S MANUAL FORCE COMPUTERS
3-12
3.3 The System EPROM Area
The first two read cycles after RESET of the microprocessor are fetches of the Initial Interrupt Stack Pointer
and the Initial Program Counter. These cycles are executed under addresses $0 and $4 respectively. A
special control logic maps the System EPROM Area down to this address to start the CPU from the
installed EPROMs. As a result of this downmapping, the first two long words in the EPROM must contain
the following data:
$0 in EPROM Initial Interrupt Stack Pointer
$4 in EPROM Initial Program Counter
The data path of the System EPROM Area is 32 bits wide. The system EPROM consists of two 16 bit wide
EPROM devices.
3.3.1 Memory Organization of the System EPROM Area
The memory organization of the System EPROM and the location number of the sockets are outlined in the
following figure. The one after that shows the location diagram of the sockets.
Figure 3-1: Memory Organization of the System EPROM Area
Long Word Address D31 D24 D23 D16 D15 D8 D7 D0
$FF00 0000
Byte 0 Byte 1 Byte 2 Byte 3
$FF00 0000 $FF00 0001 $FF00 0002 $FF00 0003
$FF00 0004
Byte 4 Byte 5 Byte 6 Byte 7
$FF00 0004 $FF00 0005 $FF00 0006 $FF00 0007
.
.
.
UU UM LM LL
J30 J30 J29 J29
UU = Upper Upper Byte in J30
UM = Upper Middle Byte in J30
LM = Lower Middle Byte in J29
LL = Lower Lower Byte in J29