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PCI Bus Interface:
PCI Configuration Registers
10006609-03
Pm8560
User’s Manual
7-5
Power-on Reset Modes
PCI Power-on Reset (POR) is provided in three modes: host, agent, and agent configuration
lock. Specific configuration register bits are set according to the POR mode.
Table 7-2:
Power-on Reset Configuration
Monarch Mode
The Pm8560 supports the Monarch features of the Processor PMC (ANSI/VITA 32-2003)
specification (See Technical References in
Table 1-3
). The PMC_MONARCH signal is con-
nected to the CPLD and is read through the CPLD PCI Status register (see PCI Status register
2C
Subsystem Device ID
Subsystem Vendor ID
30
reserved
34
reserved
PCI Bus Capability
Pointer
38
reserved
3C
PCI Bus MAX_LAT
PCI Bus MIN_GNT
PCI Bus Interrupt Pin
PCI Bus Interrupt Line
40
reserved
44
PCI Bus Arbiter Configuration
PCI Bus Function
48-E0
reserved
E4
reserved
CompactPCI Hot Swap Control and Status
E8
Vital Product Data Capability
EC
Vital Product Data
POR Mode:
Configuration Register
(offset) 0x04:
Configuration Register
(offset) 0x44:
Bus Master
(bit 2)
Memory
Space (bit 1)
ACL
(bit 5):
PAH
(bit 0):
Host
1
0
X
0
Agent
0
0
0
1
Agent configuration lock
0
0
1
1
Address Offset
(hex)
31 16 15
0
Summary of Contents for Pm8560
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Page 72: ...PCI Bus Interface PMC Connector Pin Assignments Pm8560 User s Manual 10006609 03 7 10 ...
Page 112: ...Development Mezzanine Card Troubleshooting Pm8560 User s Manual 10006609 03 10 12 ...
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