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On-Card Memory:
Serial EEPROMs
Pm8560 User’s Manual
10006609-03
4-2
SERIAL EEPROMS
There are three Atmel (AT24C64A) two-wire serial EEPROMs on the I
2
C interface, consisting
of the Serial Clock (SCL) and the Serial Data (SDA) lines. There is one device each for: Vital
Product Data (0x57) (see page 7-2), user EEPROM (NVRAM) #1 (0x51), and the MPC8560
configuration EEPROM (0x50). Write protect control for the MPC8560 EEPROM and user
EEPROM #1 are controlled by the Miscellaneous Control (MISC) register, see page 8-11.
The 64K device is accessed through the I
2
C interface pins (AH23/AH22) on the MPC8560
and supports a 32-byte page write mode. It provides a minimum endurance of 1,000,000
write cycles and data retention of 100 years.
The I
2
C EEPROM supports a bidirectional data transfer protocol. The protocol defines any
device that sends data onto the bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is the processor, and the I
2
C EEPROM being controlled is
the slave. The processor always initiates data transfers and provides the clock for both trans-
mit and receive operations. Initialization software for the I
2
C EEPROM should issue a start
condition immediately followed by a stop condition to reset EEPROM to a known state,
since the chip maintains its state even between power-ups.
For more information on the Atmel EEPROM, refer to the
Atmel Two-wire Serial EEPROM 32K
(4096x8) 64K (8192x8)
.
Emerson Memory Map
The Pm8560 uses a 64 kilobyte I
2
C SROM for storing non-volatile information such as
board, monitor, operating system configurations, as well as information specific to user
application. All Emerson-specific data is stored in the upper two kilobytes of the device. The
remainder of the device is available for user application.
Table 4-1
defines the organization
of data within the SROM.
Table 4-1:
NVRAM SROM Memory Map
Caution:
The test software log places its results in the following region: 0x0800-0x1EFF (5888 bytes).
If test software is executed on this board, anything in this region will be overwritten.
Address Offset (hex):
Description:
Window Size (bytes):
0x1E00—0x1FFF
reserved
512
0x1DDC—0x1DFF
Boot verify parameters
36
0x1DD8—0x1DDB
POST diagnostic results
4
0x0800—0x1DD7
User defined parameters
5,592
0x0100—0x07FF
Monitor configuration parameters
1,792
0x0000—0x00FF
Operating system parameters
256
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Summary of Contents for Pm8560
Page 8: ...Contents continued Pm8560 User s Manual 10006609 03 vi ...
Page 10: ...Pm8560 User s Manual 10006609 03 viii blank page ...
Page 12: ...Pm8560 User s Manual 10006609 03 x blank page ...
Page 14: ...Pm8560 User s Manual 10006609 03 ii blank page ...
Page 36: ...Setup Troubleshooting Pm8560 User s Manual 10006609 03 2 12 ...
Page 54: ...Serial I O Baud Rate Selection Pm8560 User s Manual 10006609 03 5 4 ...
Page 62: ...TDM Interface Rear Panel I O Connector P14 Pm8560 User s Manual 10006609 03 6 8 ...
Page 72: ...PCI Bus Interface PMC Connector Pin Assignments Pm8560 User s Manual 10006609 03 7 10 ...
Page 112: ...Development Mezzanine Card Troubleshooting Pm8560 User s Manual 10006609 03 10 12 ...
Page 138: ...Monitor Download Formats Pm8560 User s Manual 10006609 03 11 26 ...
Page 144: ...Index continued Pm8560 User s Manual 10006609 03 i 4 ...