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Programmable Logic Device:
PLD Register Summary
10006609-03
Pm8560
User’s Manual
8-9
Register 8-11:
PCI Status (PSR), 0x2C
reserved:
Default is 00000
PCIM66:
PCI 66 MHz enable reflects the current status of the PCI M66EN pin (on connector P12).
0 Enables 33 MHz
1 Enables 66 MHz
PMCM:
PMC Monarch
0 Pm8560 is not the Monarch
1 Pm8560 is the Monarch
PCIE:
PCI EREADY (Pm8560 CPU)
Monarch (read)
0 At least one PCI device is not ready for enumeration
1 All PCI devices are ready for enumeration
Non-Monarch (write)
0 Pm8560 is not ready for enumeration (default)
1 Pm8560 is ready for enumeration
Boot Device Failover Mechanism
The read-only Boot Device Failover Mechanism (BDFM) register is only functional when the
DMC is not installed on the Pm8560. This register enables the Pm8560 to recover from
monitor corruption by booting from a redundant copy in another flash device. The mecha-
nism relies on the processor’s internal watchdog to expire when corrupted code fails to
reset the timer. To detect corruption before the boot code has configured the internal
watchdog, a second timer is implemented in the CPLD hardware. This CPLD watchdog
begins counting down as soon as the board is power cycled or reset. If the timer expires
(approximately half of a second), the boot failover mechanism will activate and the board
will reset. Following this automatic reset, the processor will attempt to boot from the next
flash device according to
Fig. 8-1
. This sequence will continue until a valid boot image clears
the watchdog.
The Monitor software performs a one-time write to the BDFM register to disable the CPLD
watchdog after a successful boot. This write occurs after the processor watchdog is config-
ured and enabled.
Note:
To support use of a processor COP header on the DMC, it is necessary to disable the CPLD watchdog. The CPLD
watchdog is automatically disabled when the DMC is present.
7
6
5
4
3
2
1
0
reserved
PCIM66
PMCM
PCIE
Summary of Contents for Pm8560
Page 8: ...Contents continued Pm8560 User s Manual 10006609 03 vi ...
Page 10: ...Pm8560 User s Manual 10006609 03 viii blank page ...
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Page 14: ...Pm8560 User s Manual 10006609 03 ii blank page ...
Page 36: ...Setup Troubleshooting Pm8560 User s Manual 10006609 03 2 12 ...
Page 54: ...Serial I O Baud Rate Selection Pm8560 User s Manual 10006609 03 5 4 ...
Page 62: ...TDM Interface Rear Panel I O Connector P14 Pm8560 User s Manual 10006609 03 6 8 ...
Page 72: ...PCI Bus Interface PMC Connector Pin Assignments Pm8560 User s Manual 10006609 03 7 10 ...
Page 112: ...Development Mezzanine Card Troubleshooting Pm8560 User s Manual 10006609 03 10 12 ...
Page 138: ...Monitor Download Formats Pm8560 User s Manual 10006609 03 11 26 ...
Page 144: ...Index continued Pm8560 User s Manual 10006609 03 i 4 ...