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Programmable Logic Device:
Serial Presence Detect (SPD)
10006609-03
Pm8560
User’s Manual
8-23
Minimum Row Delay Between Activations
Register 8-27:
SPD Minimum Row Delay Between Activations (SPDMDBRA), 0x70
TRPWHNS:
Minimum delay between different row activations for the on-board DDR SDRAM (whole
nanosecond granularity)
000000 Reserved
000001 1 ns
000010 2 ns
000011 3 ns
...
111110 62 ns
111111 63 ns
TRPQTRNS:
Minimum delay between different row activations for the on-board DDR SDRAM (quarter
nanosecond granularity)
00 + 0 ns
01 + .25 ns
10 + .50 ns
11 + .75 ns
Minimum Row Delay Between RAS-to-CAS Assertions
Register 8-28:
SPD Minimum Row Delay Between RAS-to-CAS Assertions (SPDMDBRCA), 0x74
TRCDWHNS:
Minimum delay required between assertions of RAS and CAS for the on-board DDR SDRAM
(whole nanosecond granularity)
000000 Reserved
000001 1 ns
000010 2 ns
000011 3 ns
...
111110 62 ns
111111 63 ns
7
6
5
4
3
2
1
0
TRPWHNS
TRPQTRNS
7
6
5
4
3
2
1
0
TRPWHNS
TRPQTRNS
Summary of Contents for Pm8560
Page 8: ...Contents continued Pm8560 User s Manual 10006609 03 vi ...
Page 10: ...Pm8560 User s Manual 10006609 03 viii blank page ...
Page 12: ...Pm8560 User s Manual 10006609 03 x blank page ...
Page 14: ...Pm8560 User s Manual 10006609 03 ii blank page ...
Page 36: ...Setup Troubleshooting Pm8560 User s Manual 10006609 03 2 12 ...
Page 54: ...Serial I O Baud Rate Selection Pm8560 User s Manual 10006609 03 5 4 ...
Page 62: ...TDM Interface Rear Panel I O Connector P14 Pm8560 User s Manual 10006609 03 6 8 ...
Page 72: ...PCI Bus Interface PMC Connector Pin Assignments Pm8560 User s Manual 10006609 03 7 10 ...
Page 112: ...Development Mezzanine Card Troubleshooting Pm8560 User s Manual 10006609 03 10 12 ...
Page 138: ...Monitor Download Formats Pm8560 User s Manual 10006609 03 11 26 ...
Page 144: ...Index continued Pm8560 User s Manual 10006609 03 i 4 ...