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Setup:
Pm8560 Setup
10006609-03
Pm8560
User’s Manual
2-7
Figure 2-4:
Reset Diagram
System JTAG Chain
The Pm8560 has a dynamically structured JTAG chain that adds valuable debugging fea-
tures. JTAG type boundary scan testing can be performed on the major board devices
through the PMC connectors, P11 and P12. A quick switch isolates the CPLD and MPC8560
from the rest of the JTAG chain when a DMC module is installed. This isolation provides the
ability to program the device CPLD or use an In-circuit Emulator (ICE) debugger in conjunc-
tion with the MPC8560 COP/JTAG port. Refer to pages 10-5 and 10-6 for detailed views of
the DMC debug connectors.
Flash
COP/JTAG
Header
Framer
MT9045
GB
Ethernet
Voltage
Monitor
250mS
Delay
Voltage
Monitor
250mS
Delay
P11
P12
MPC8560
Processor
CPU_HRESET
CPU_SRESET
CPU_TRST
HRESET_REQ (WDE)
CPU RESET CONFIG
REGISTER ACCESS
FLASH_RST
FRM_RST
MT9045_RST
GIG_RST
Device
CPLD
Clocks
Reset
Control
POR_RST
PCI_RST
PCI_RSTOUT
PWR_OK
Switcher
1.2V
1.25V
2.5V
1.8V
3.3V
4.4V (QS_PWR)
Front Panel
Reset Switch
PMC_3_3V
PMC_3_3V
PMC_5V
PCI_RST
Switcher
Switcher
Switcher
DEBUG_HRESET
DEBUG_SRESET
DEBUG_TRST
Summary of Contents for Pm8560
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Page 36: ...Setup Troubleshooting Pm8560 User s Manual 10006609 03 2 12 ...
Page 54: ...Serial I O Baud Rate Selection Pm8560 User s Manual 10006609 03 5 4 ...
Page 62: ...TDM Interface Rear Panel I O Connector P14 Pm8560 User s Manual 10006609 03 6 8 ...
Page 72: ...PCI Bus Interface PMC Connector Pin Assignments Pm8560 User s Manual 10006609 03 7 10 ...
Page 112: ...Development Mezzanine Card Troubleshooting Pm8560 User s Manual 10006609 03 10 12 ...
Page 138: ...Monitor Download Formats Pm8560 User s Manual 10006609 03 11 26 ...
Page 144: ...Index continued Pm8560 User s Manual 10006609 03 i 4 ...