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H A R D W A R E
To request a Main Bus interface write transaction, the USB Controller program sends a USB
bulk write to EP2 (endpoint 2). The first byte contains a code, either 0x00 or 0x01, determining
whether the next 4 bytes contain an address or a datum. If this byte is a 0x00, the next 4 bytes in
the bulk transfer are stored into an address register. All data transferred to and from the main
bus is LSB first. The address 0x12345678 should be sent as a bulk transfer of 5 bytes: 0x00,
0x78, 0x56, 0x34, 0x12. To send a datum, send the code 0x01, followed by 4 bytes, LSB first.
When the DN9002K10PCI receives a data word, it sends it onto the main bus interface to the
address in the address register. It then increments the address register. Therefore, to send two
words over main bus, 0x00000001 to address 0x0000001 and 0x00000002 to address
0x00000002, the USB Controller would send the following 15 bytes to USB EP2:
0x00 0x01 0x00 0x00 0x00
0x01 0x01 0x00 0x00 0x00
0x01 0x02 0x00 0x00 0x00
Note that the number of bytes sent to EP2 must be divisible by 5.
To request a main bus read operation, the USB Controller sends a USB bulk write to EP2 to set
the address register, as described in the above paragraph. Then, the USB Controller sends a bulk
read to EP6 (endpoint 6), with the USB bulk request SIZE field set to the number of bytes
requested. The number requested must be divisible by 4. After the bulk read is complete, the
address register is incremented by SIZE/4. Read and write transactions use the same
Before starting a USB read using a bulk transfer, you must tell the DN9002K10PCI how many
bytes are going to be read by using the VR_SET_EP6TC (0xBB) vendor request described in
the
Vendor Requests
section.
6.3.1
Important Note About Endpoints
There is only one endpoint that the user should use: endpoint 2. Note that an endpoint is bi-
directional. Using the driver that Dini group provides, the endpoint and direction fields are
stuffed within the same byte. To write to endpoint 2, this byte should be 0x02. To read, it
should be 0x08. Some people refer to these as uni-directional endpoints 2 and 8.
6.3.2
Performance
Main Bus over USB runs at a maximum speed of 80Mbs for reads, and 32Mbs for writes. These
numbers assume that the FPGA operates the Main Bus interface with zero wait cycles. If the
FPGA design has more wait cycles, this speeds decreases. The approximate speed of Main Bus
over USB is given below as a function of Main Bus wait states.
0 cycles
80Mbs read 32Mbs
write
1 cycle
76Mbs read
31Mbs write
5 cycles
64Mbs read 29Mbs
write
30 cycles
32Mbs read
16Mbs write
100 cycles
13Mbs read 11Mbs
write
250 cycles
6Mbs read
5Mbs write
DN9002K10PCI User Guide
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