Dini Group DN9002K10PCI, User Manual

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H A R D W A R E
17 FPGA Interconnect.
The point-to-point interconnect on the DN9002K10PCI is designed to operate at the
maximum switching frequency possible on the DN9002K10PCI. The fastest switching standard
available on the Virtex 5 FPGA is LVDS. Using this standard on the interconnect of a
DN9002K10PCI; we have demonstrated switching frequencies as high as 950Mbs.
A block diagram of the point-to-point interconnect is below.
The interconnect in the above diagram is confusingly described as sets of two busses. Marketing
explained why this was, but I forget the rationale now. “DE” is the bus between FPGA D and
FPGA E. It contains 120 “p” signals and 120 “n” signals. This means there are 240 total signals
between D and E. If you use LVDS and pain the “p” and “n” signals, you would have 120
LVDS signals between these two FPGAs.
The above diagram is only valid when the board is install with only LX330 FPGAs (the largest
available size). When any LX220 or LX110 FPGAs are installed, the interconnect available
between FPGAs drops significantly. In the “Ordering Information” chapter of this manual,
there is a block diagram showing the available features on a board loaded with LX220 or smaller
FPGAs. If the board has mixed LX220 and LX330 FPGAs, then the interconnect available
between any two FPGAs is the lesser of the signal counts shown in these diagrams.
Each FPGA-to-FPGA interconnect signal is tested at 700Mbs prior to shipping, no matter
which speed grade is installed on your board. Higher speeds are possible, given appropriate IO
timing methodology and speed grade parts. The theoretical limitation imposed by the
DN9002K10PCI is 1.1Gbs, the limit of the Virtex 5’s internal clock network. Dini group has
demonstrated speeds up to 0.95Gbs on each pair of interconnect signals.
Information on how to achieve this interconnect switching speed can be obtained by examining
the Xilinx application note XAPP855. Other methods of implanting high-bandwidth
interconnect are described in XAPP860.
The Dini Group reference design uses an older method designed for Virtex-4.
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