H A R D W A R E
DN9002K10PCI User Guide
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138
If the board is not in reset, the RS232 terminal will be active. Connect a computer serial port to
this header and open a
terminal program on the computer. Start->Programs->Accessories-
>Communication->HyperTerminal is a suitable program. We use VanDyke software
o
2 terminal and follow the instructions in the preceding paragraph.
Usually, when an FPGA fails to program, the configuration section will detect the problem and
mon problems the configuration section might
e on the CompactFlash card is for the wrong type of FPGA
- The CompactFlash card is not formatted with a file system that the DN9002K10PCI can read
did not go high”, then
that are not compatible with the DN9002K10PCI.
When you contact Dini Group for support, we will need a capture of the RS232 terminal
re that the clock your design uses is running. Output the clock to an LED and probe it
LOC constraints. There is never a reason not to constrain an IO.
Check for Timing errors in the timing report
SecureCRT program, because it doesn’t suck. Hopefully the RS232 configuration status dump
will tell you exactly what the problem is. In any case, the Dini Group will need this capture t
diagnose the problem.
26.2
The FPGAs won’t program
First, connect the RS23
print an error message to this terminal. Com
report are:
- The syntax in the main.txt file is incorrect
- The bit fil
If the DN9002K10PCI reports about one or more FPGAs that “DONE
there is a problem with the bit file. The bit file may have been generated using bitgen options
See if the FPGAs will configure using USB, PCI or JTAG.
output.
26.3
My design doesn’t do anything
Make su
with an oscilloscope.
Check the pinout in your constraint file. Check the .PAR report file to make sure that 100% of
your IOBs used have
Use the .PAD report to make sure your constraints were all applied. Some situations may cause
constraints to be ignored.
Double-check that the connections match between your FPGA pins and the daughtercard pins
using the schematic.
If “MainBus” interface is not working, make sure that none of the other FPGAs are driving
those MB pins.
Make sure that the "Unused IOBs" option in bitgen is set to "Float
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