Cypress S6J331EJSESE20000, Manual

Page: 257 / 326

Document Number: 002-10635 Rev. *I Page
257 of 325
S6J3310/20/30/40 Series
9.1.6
Audio DAC
9.1.6.1
Electrical Characteristics
(T
A
: Recommended operating conditions, AV
CC
3_DAC = 3.3 V ± 0.3 V, V
CC
12 = 1.15 V ± 0.06 V, V
SS
= AV
SS
= 0.0 V)
Parameter Symbol
Pin
Name
Conditions *1
Value
Unit Remarks
Min Typ Max
system clock
frequency
F
CLKDA0
- - 2.048 -
18.43
2
MH
z
-
sampling clock fs - - 8 - 48 kHz -
Analog output load
resistance
*2
R
L
DAC_L
DAC_R
- 20 - - kΩ -
Analog output load
capacitance
*2
C
L
- - - 100 pF -
capacitance -
C_L
C_R
- 1.1 2.2 10 µF -
Analog output
single-end output
range
(±full scale)
-
DAC_L
DAC_R
R
L
= 20 kΩ
C
L
= 100 pF
-
0.673
AV
CC
3_DAC
- V
P-P
-
Analog output
voltage (zero)
- - -
0.5
AV
CC
3_DAC
- V -
THD+N
*3
- -
signal frequency:
1 kHz
LPF (fc: 20 kHz)
- -82 -72 dB -
SNR *3 - - signal frequency:
1 kHz
LPF (fc: 20 kHz)—
— A-weighting filter
85 89 - dB -
Dynamic range *3 - - 83 86 - dB -
Out-of-Band Energy - - 20 kHz to 64 fs - - -33 dB -
Channel Separation - - - - 80 - dB -
Output impedance - - - 150 200 250 Ω -
PSRR - -
digital
input:
zero
noise
50 Hz
- -35 - dB -
noise
1 kHz
- -50 - dB -
noise
20 kHz
- -40 - dB -
digital input: full
scale sine
- -13 - dB -
Supply current
normal operation
-
AVCC3
_DAC
- - 2.2 3.2 mA -
Supply current
power-down
-
AVCC3
_DAC
- - - 100 µA -
Startup Time *4 - - DAE↑ - 650 *6 - ms -
*1: All parameters specified fs = 44.1 kHz, system clock 256 fs and 16-bit data, RL-20 kΩ, CL = 100 pF, unless otherwise noted.
*2: Refer to notes *5
*3: These values do not include the noise caused by the analog power supply. (Refer to *7. Use examples)
*4: 2.2 µF is connected to C_L, C_R.
*5: Load connection
R
L
is connected to AVCC3_DAC /2 (Figure 9.1).
If R
L
is connected to ground, the coupling capacitance must be inserted as shown in (Figure 9.3)