Document Number: 002-10635 Rev. *I
Page
157 of 325
S6J3310/20/30/40 Series
Register
(Offset)
Port
Resource Functional Outputs
POF = 0
POF = 1
POF = 2
POF = 3
POF = 4
POF = 5
POF = 6
POF = 7
PPC_PCF
GR418
(0x0124)
P4_18
GPIO_PO
DR4:POD
18
-
-
-
-
-
-
-
PPC_PCF
GR419
(0x0126)
P4_19
GPIO_PO
DR4:POD
19
-
-
-
-
-
-
-
PPC_PCF
GR420
(0x0128)
P4_20
GPIO_PO
DR4:POD
20
-
-
-
-
SOT16_1
-
-
PPC_PCF
GR421
(0x012A)
P4_21
GPIO_PO
DR4:POD
21
-
-
-
-
SCK16_1
-
-
PPC_PCF
GR422
(0x012C)
P4_22
GPIO_PO
DR4:POD
22
-
-
-
-
SCS161_
1
-
-
PPC_PCF
GR423
(0x012E)
P4_23
GPIO_PO
DR4:POD
23
-
-
-
-
SCS160_
1
-
-
PPC_PCF
GR424
(0x0130)
P4_24
GPIO_PO
DR4:POD
24
-
-
-
-
-
-
-
PPC_PCF
GR425
(0x0132)
P4_25
GPIO_PO
DR4:POD
25
-
-
-
-
-
-
-
PPC_PCF
GR426
(0x0134)
P4_26
GPIO_PO
DR4:POD
26
-
-
-
-
-
-
-
PPC_PCF
GR427
(0x0136)
P4_27
GPIO_PO
DR4:POD
27
-
-
-
-
-
-
-
PPC_PCF
GR428
(0x0138)
P4_28
GPIO_PO
DR4:POD
28
-
-
-
-
-
-
-
PPC_PCF
GR429
(0x013A)
P4_29
GPIO_PO
DR4:POD
29
-
-
-
-
-
-
-
PPC_PCF
GR430
(0x013C)
P4_30
GPIO_PO
DR4:POD
30
-
-
-
-
-
-
-
PPC_PCF
GR431
(0x013E)
P4_31
GPIO_PO
DR4:POD
31
SCK2_1
-
-
-
-
-
-
Notes:
−
The hyphen indicates that setting is prohibited. If setting the port will be operated as input independent on the register value
of the GPIO_DDR.
−
The register for P0_20 for POF exists though the port only supports input not supports output. The configuration of POF = 0
for the port does not affect anything.