Document Number: 002-10635 Rev. *I
Page
12 of 325
S6J3310/20/30/40 Series
Feature
Description
Programmable CRC
DMA support
Sound Generator
Produces sound/melody with varying frequency and amplitude for convenient duration
Square wave sound output
Automatic linear amplitude increment or decrement
Interrupt request generated when specified sound length has ended
Sound Waveform
generator
Sine waveform, saw-tooth waveform and Square waveform are generated with easy
configuration of the parameters which specified sound sources.
Fade-in and Fade-out control for reverberation.
Sound Mixer
The input channels of 0 - 4 are reserved for waveform generator.
Mixing different sampling frequency sounds.
Mixing Internal sounds and External I2S input sounds.
Saturating addition function for keeping sound quality.
Cut a specific frequency data by digital filter.
LPF is support by FIR filter.
Fade-in and Fade-out control.
PCM-PWM
Conversion of PCM audio streaming to Pulse Width Modulated signals.
Supports 2 output channels for stereo and mono data
Up to 16-bit output sample resolution
Support for half and full H-bridges
Audio DAC
The sound source of the fixed 48 kHz sampling frequency can be outputted.
1 unit, L/R channels support.
BTL connection is available.
I2S
2 ch.
−
I2S0 only supports the output of sound sources.
−
I2S1 supports both the input and the output.
Base Timer
See the
Traveo
TM
Platform Hardware Manual
in detail.
A unit consists of a pair of 16-bit base timers. 16 units, that is, 32 channels of base timers are
available.
Reload Timer
See the
Traveo
TM
Platform Hardware Manual
in detail.
I/O Timer
See the
Traveo
TM
Platform Hardware Manual
in detail.
Up/Down Counter
See the
Traveo
TM
Platform Hardware Manual
in detail.
Multi-Functional Serial
(MFS)
See the
Traveo
TM
Platform Hardware Manual
in detail.
Only 2 ports of MFS have the dedicated I/O for I
2
C.
See I
2
C timing in 9.1.4.6 Multi-Function Serial in detail.
The I
2
C is not designed to be hot swappable.
CTS/RTS is not mounted (hardware flow control is not supported for this series.)
CAN-FD
Flexible data rate is supported.
16 KB/ch of message RAM is available.
The clock output from CAN pre-scaler is supplied to every CAN. ECC error generation function
of the message RAM is not supported for this device. Therefore CAN FD ECC Error Insertion
Control Register (FDFECR) is not writeable.
Real Time Clock (RTC)
with auto-calibration
See the
Traveo
TM
Platform Hardware Manual
in detail.
DDR High Speed SPI
ch.0: HSSPI as a MCU peripheral
Hyper BUS I/F
ch.0: Hyper Bus as a MCU peripheral
The following register is not supported and cannot be used.
−
Controller Status Register (HYPERBUSIn_CSR)
−
Interrupt Enable Register (HYPERBUSIn_IEN)
−
Interrupt Status Register (HYPERBUSIn_ISR)
−
Write Protection Register (HYPERBUSIn_WPR)
−
Test Register (HYPERBUSIn_TEST)
GPO signal can only be used for "Internal Control example by GPO" in this product, that is, it can
select using HyperBus of PF or using HyperBus of Graphic Sub System.
