
b. Input/Output Port of the ADF (2/2)
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COPYRIGHT © 1996 CANON INC. CANON GP215/200 REV.0 JULY 1996 PRINTED IN JAPAN (IMPRIME AU JAPON)
3. OPERATIONS AND TIMING
Address
DFPB
DFP0
bit
Indication
0
PCB internal signal
1
PCB internal signal
2
PCB internal signal
3
PCB internal signal
4
PCB internal signal
5
PCB internal signal
6
PCB internal signal
7
PCB internal signal
0
original width detection 2
1
original width detection 1
2
original width detection 3
3
original width detection 4
4
original length detection 1
(PI9)
5
original length detection 1
OPI8)
6
original length detection 1
(PI7)
7
PCB internal signal
Signal
SW72
SW71
SW73
SW74
DLDL
DLDM
DLDS
Jack
J7-2
J7-3
J7-4
J7-5
J5-2
J5-3
J5-4
Logic