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COPYRIGHT © 1996 CANON INC. CANON GP215/200 REV.0 JULY 1996 PRINTED IN JAPAN (IMPRIME AU JAPON)
3. OPERATIONS AND TIMING
3. CPU Input/Output Ports of the DC Controller
CANCEL
+
OK
*2* I/O DISPLAY 03
IP PA0 : xxxxxxxx
IP PB0 : xxxxxxxx
IP PC0 : xxxxxxxx
–
Address
PA0
PB0
PC0
bit
Indication
0
primary charging DC bias
switching
1
developing bias DC application
mode
2
transfer output mode 0
3
transfer output mode 1
4
primary charging roller
ON/OFF
5
static eliminator ON/OFF
6
laser scanner motor reference
clock
7
developing AC drive
0
scanner motor reference clock
(PCB internal signal)
1
scanner motor CW/CCW rota-
tion (PCB internal signal)
2
composite power supply PCB
communication signal
3
zero cross
4
5
developing DC drive
6
Not used.
7
Not used.
0
composite power supply PCB
communication signal
1
Not used.
2
upper cassette paper detection
0
3
upper cassette paper detection
1
4
lower cassette paper detection
0
5
lower cassette paper detection
1
6
Not used.
7
Not used.
Signal
HVPH
HADCH
HVYM0
HVTM1
HVPDC
HVD1
FS
ACON
ACK
ZC
CDON
REQ
UCRMN
UCRMN
LCRMN
LCRMN
Jack
J102-B9
J102-B8
J102-B7
J102-B6
J102-B5
J102-B4
J112-8
J102-B3
J102-A6
J102-A8
J102-B2
J102-A7
J122-1
J122-2
J122-3
J122-4
Logic