180
7679H–CAN–08/08
AT90CAN32/64/128
units use a state machine that uses 2, 8 or 16 states depending on mode set by the state of the
UMSELn, U2Xn and DDR_XCKn bits.
contains equations for calculating the baud rate (in bits per second) and for calculat-
ing the UBRRn value for each mode of operation using an internally generated clock source.
Note:
1. The baud rate is defined to be the transfer rate in bit per second (bps)
BAUD
Baud rate (in bits per second, bps).
f
clk
io
System I/O Clock frequency.
UBRRn
Contents of the UBRRnH and UBRRnL Registers, (0-4095).
Some examples of UBRRn values for some system clock frequencies are found in
(see
).
17.4.2
Double Speed Operation (U2X)
The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit only has
effect for the asynchronous operation. Set this bit to zero when using synchronous operation.
Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling
the transfer rate for asynchronous communication. Note however that the Receiver will in this
case only use half the number of samples (reduced from 16 to 8) for data sampling and clock
recovery, and therefore a more accurate baud rate setting and system clock are required when
this mode is used. For the Transmitter, there are no downsides.
17.4.3
External Clock
External clocking is used by the synchronous slave modes of operation. The description in this
section refers to
for details.
External clock input from the XCKn pin is sampled by a synchronization register to minimize the
chance of meta-stability. The output from the synchronization register must then pass through
an edge detector before it can be used by the Transmitter and Receiver. This process intro-
duces a two CPU clock period delay and therefore the maximum external XCKn clock frequency
is limited by the following equation:
Table 17-1.
Equations for Calculating Baud Rate Register Setting
Operating Mode
Equation for Calculating Baud
Equation for Calculating
UBRRn Value
Asynchronous Normal mode
(U2Xn = 0)
Asynchronous Double Speed
mode (U2Xn = 1)
Synchronous Master mode
BAUD
f
CLKio
16
UBRRn
1
+
(
)
------------------------------------------
=
UBRRn
f
CLKio
16
BAUD
------------------------
1
–
=
BAUD
f
CLKio
8
UBRRn
1
+
(
)
---------------------------------------
=
UBRRn
f
CLKio
8
BAUD
--------------------
1
–
=
BAUD
f
CLKio
2
UBRRn
1
+
(
)
---------------------------------------
=
UBRRn
f
CLKio
2
BAUD
--------------------
1
–
=
f
XCKn
f
CLKio
4
----------------
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