121
7679H–CAN–08/08
AT90CAN32/64/128
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation selected by
the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
13.6
Input Capture Unit
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicating an event, or mul-
tiple events, can be applied via the ICPn pin or alternatively, via the analog-comparator unit. The
time-stamps can then be used to calculate frequency, duty-cycle, and other features of the sig-
nal applied. Alternatively the time-stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in
. The elements of
the block diagram that are not directly a part of the Input Capture unit are gray shaded.
Figure 13-3.
Input Capture Unit Block Diagram
Note:
The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 IC Unit– not
Timer/Counter3.
When a change of the logic level (an event) occurs on the Input Capture pin (ICPn), alternatively
on the Analog Comparator output (ACO), and this change confirms to the setting of the edge
detector, a capture will be triggered. When a capture is triggered, the 16-bit value of the counter
(TCNTn) is written to the Input Capture Register (ICRn). The Input Capture Flag (ICFn) is set at
the same system clock as the TCNTn value is copied into ICRn Register. If enabled (ICIEn = 1),
the Input Capture Flag generates an Input Capture interrupt. The ICFn flag is automatically
WRITE
ICRn (16-bit Register)
ICRnH
(8-bit)
TEMP (8-bit)
DATA BUS
(8-bit)
ICRnL
(8-bit)
TCNTn (16-bit Counter)
TCNTnH
(8-bit)
TCNTnL
(8-bit)
ICF1 (Int.Req.)
Noise
Canceler
Edge
Detector
ACIC*
ICNC1
ICES1
ICP1
Analog
Comparator
ACO*
ICF3 (Int.Req.)
Noise
Canceler
ICP3
Edge
Detector
ICNC3
ICES3
