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chronous operation is used, the clock on the XCKn pin will be overridden and used as
transmission clock.
17.7.1
Sending Frames with 5 to 8 Data Bit
A data transmission is initiated by loading the transmit buffer with the data to be transmitted. The
CPU can load the transmit buffer by writing to the UDRn I/O location. The buffered data in the
transmit buffer will be moved to the Shift Register when the Shift Register is ready to send a new
frame. The Shift Register is loaded with new data if it is in idle state (no ongoing transmission) or
immediately after the last stop bit of the previous frame is transmitted. When the Shift Register is
loaded with new data, it will transfer one complete frame at the rate given by the Baud Register,
U2Xn bit or by XCKn depending on mode of operation.
The following code examples show a simple USART0 transmit function based on polling of the
Data Register Empty (UDRE0) flag. When using frames with less than eight bits, the most signif-
icant bits written to the UDR0 are ignored. The USART0 has to be initialized before the function
can be used. For the assembly code, the data to be sent is assumed to be stored in Register
R16
.
Note:
1. The example code assumes that the part specific header file is included.
The function simply waits for the transmit buffer to be empty by checking the UDRE0 flag, before
loading it with new data to be transmitted. If the Data Register Empty interrupt is utilized, the
interrupt routine writes the data into the buffer.
Assembly Code Example
USART0_Transmit:
;
Wait for empty transmit buffer
lds
r17, UCSR0A
sbrs
r17, UDRE0
rjmp
USART0_Transmit
;
Put data (r16) into buffer, sends the data
sts
UDR0, r16
ret
C Code Example
void
USART0_Transmit (
unsigned char
data)
{
/*
Wait for empty transmit buffer
*/
while
( ! ( UCSRA0 & (1<<UDRE0)));
/*
Put data into buffer, sends the data
*/
UDR0 = data;
}
