383
7679H–CAN–08/08
AT90CAN32/64/128
27. Decoupling Capacitors
The operating frequency (i.e. system clock) of the processor determines in 95% of cases the
value needed for microcontroller decoupling capacitors.
The hypotheses used as first evaluation for decoupling capacitors are:
• The operating frequency (
f
op
) supplies itself the maximum peak levels of noise. The main
peaks are located at
f
op
and 2
•
f
op
.
• An SMC capacitor connected to 2 micro-vias on a PCB has the following characteristics:
– 1.5 nH from the connection of the capacitor to the PCB,
– 1.5 nH from the capacitor intrinsic inductance.
Figure 27-1.
Capacitor description
According to the operating frequency of the product, the decoupling capacitances are chosen
considering the frequencies to filter,
f
op
and 2
•
f
op
.
The relation between frequencies to cut and decoupling characteristics are defined by:
and
where:
– L: the inductance equivalent to the global inductance on the Vcc/Gnd lines.
– C
1
& C
2
: decoupling capacitors (C
1
= 4
•
C
2
).
Then, in normalized value range, the decoupling capacitors become:
These decoupling capacitors must to be implemented as close as possible to each pair of power
supply pins:
– 21-22 and 52-53 for logic sub-system,
– 64-63 for analogical sub-system.
Nevertheless, a bulk capacitor of 10-47 µF is also needed on the power distribution network of
the PCB, near the power source.
For further information, please refer to Application Notes AVR040 “EMC Design Considerations“
and AVR042 “Hardware Design Considerations“ on the Atmel web site.
Table 27-1.
Decoupling Capacitors vs. Frequency
f
op
, operating frequency
C
1
C
2
16 MHz
33 nF
10 nF
12 MHz
56 nF
15 nF
10 MHz
82 nF
22 nF
8 MHz
120 nF
33 nF
6 MHz
220 nF
56 nF
4 MHz
560 nF
120 nF
PCB
Capacitor
1.5 nH
0.75 nH
0.75 nH
f
op
1
2
Π
LC
1
-----------------------
=
2
f
op
•
1
2
Π
LC
2
-----------------------
=
