AT32F421
Series Reference Manual
2022.11.11
Page 220
Rev 2.02
Figure 14-62 PWM input mode configuration
C1P=0
C1CP=0
edge detector
C1IF
C1IN
C1IFP1(pos)
C2IFP1
STCI
C1C(2'b01)
C1IRAW
filter
C1DF
C1EN
Capture trigger
C1INC
IS3
IS2
IS1
CI2FP2
STIS(3'b101)
Trigger
mode
Hang
mode
Reset
mode
SMSEL(3'b110)
C2P=1
C2CP=0
edge detector
C2IN
C1IFP2(neg)
C2IFP2
STCI
C2EN
Capture trigger
C2C(2'b10)
Capture
Capture
CNT counter
C1DT
C2DT
reset
(CH1 period)
(CH1 high level time)
IS0
Figure 14-63 PWM input mode
A
0
1
2
3
4
5
6
7
8
9
A
0
1
2
COUNTER
C1C
CH1
0x1
reset counter and C1DT capture
C1P
0x0
C2C
0x2
C2P
0x1
STIS
0x5
SMSEL
0x6
0xA
0x4
C1DT
C2DT
0x0
C2DT capture
3
4
5
6
7
8
9
A
0
1
2
14.4.3.4 TMR output function
The TMR output consists of a comparator and an output controller. It is used to program the period, duty
cycle and polarity of the output signal. The advanced-control timer output function varies from one
channel to one channel.
Figure 14-64 Channel 1 output stage
TMRx_CM1
C1ORAW
C1OUT
CNT_value>C1DT
CNT_value = C1DT
To the master mode
controller
CNT_value
C1DT
Compare
C1P
TMRx_BRK
Output
Compare
Mode
C1COUT
Output mode
controller
Dead time
generate
C1CP
Polarity selection
Polarity selection
C1EN
C1CEN
Output enable
Output enable