AT32F421
Series Reference Manual
2022.11.11
Page 157
Rev 2.02
CLKPOL=0, CLKPHA=0: SCK idle output low, use the first edge for sampling
FBN=0: 8-bit frame
Slave transmit: 0xaa, 0xcc, 0xaa
Figure 13-10 Slave half-duplex transmit
BF flag
SCK
CS
MISO
1
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
TDBE flag
Drive
Transmit buffer empty and
software can write data
Half-duplex communication – master receive
Configured as follows:
MSTEN=1: Master enable
SLBEN=1: Single line bidirectional mode
SLBTD=0: Receive enable
CLKPOL=0, CLKPHA=0: SCK idle output low, use the first edge for sampling
FBN=0: 8-bit frame
Master receive: 0xaa, 0xcc, 0xaa
Figure 13-11 Master half-duplex receive
SCK
BF flag
CS
MOSI
1
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
BF flag remains low
RDBF flag
Sampling
Software needs to read the
received data
13.2.10 Interrupts
Figure 13-12 SPI interrupts
RDBF
RDBFIE
TDBE
TDBEIE
ROERR
MMERR
CCERR
ERRIE
SPI interrupt