VIPA System 200V IM Series, Руководство пользователя

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Manual VIPA System 200V
Chapter 4 Interbus
HB97E - IM - Rev. 06/29 4-11
Deployment with Interbus
The bus coupler determines the configuration of the installed modules after
power on and enters the respective data into the internal process image.
This process image is sent to the master. From the process images the
master generates a process data list for all couplers connected to the bus.
The following two figures show the process data allocation list.
The bus coupler uses the following set of rules to generate the internal
process image:
•
Digital signals are bit orientated, i.e. each channel is associated with
one bit in the process image.
•
Separate areas exist for input and output data.
•
In the input and output areas non-digital modules are always placed
before digital modules.
•
The sequence of these allocations depends on the plug-in location
starting from the bus coupler.
•
Where the data width differs between inputs and outputs the larger of
the two determines the data width used by the Interbus coupler. This is
always rounded up to a complete word (max. 20Byte).
The following figures are intended to show the allocation of the process
data within the Interbus master.
Purely digital periphery
IM
25
3 I
B
S
D
I 8xD
C
24V
D
O
8xD
C
24
V
DI
1
6x
DC
24
V
DO 8
xDC
24
V
D
O
1
6xD
C
24V
DIO 8
xDC
24
V
process data allocation
inputs:
Master:
.
.
.
input byte 1
input byte 2
input byte 3
input byte 6
Input data area
for subsequent
IBS coupler
DIO 8 (1 byte)
DI 8 (1 byte)
DI 16
(2 bytes)
input byte 0
input byte 5
input byte 4
.
.
.
process data allocation
outputs:
output byte 0
output byte 1
output byte 2
output byte 3
output byte 4
output byte 6
Output data area
for subsequent
IBS coupler
Master:
DIO 8 (1 byte)
DO 8 (1 byte)
DO 16
(2 bytes)
DO 8 (1 byte)
output byte 5
Process data width
is identical for
inputs and outputs:
outputs:5 bytes
Inputs also 5 bytes
rounded up to the
nearest word
Process data width:
6 bytes
Process image