F-11
Glossary
IC:
(Used in earlier documentation.) See
interrupt control register (ICR).
ICR:
See
interrupt control register (ICR).
IFR:
See
interrupt flag register (IFR).
immediate addressing:
One of the methods for obtaining data values used
by an instruction; the data value is a constant embedded directly into the
instruction word; data memory is not accessed.
immediate operand/immediate value:
A constant given as an operand in
an instruction that is using immediate addressing.
IMR:
See
interrupt mask register (IMR).
IN0:
Bit 6 of the synchronous serial port control register (SSPCR); allows you
to use the CLKR pin as a bit input. IN0 indicates the current logic level
on CLKR.
indirect addressing:
One of the methods for obtaining data values used by
an instruction. When an instruction uses indirect addressing, data
memory is addressed by the current auxiliary register. See also
direct ad-
dressing.
input clock signal:
See
CLKIN.
input/output status register:
See I/O status register (IOSR).
input shifter:
A 16- to 32-bit left barrel shifter that shifts incoming 16-bit data
from 0 to 16 positions left relative to the 32-bit output.
instruction-decode phase:
The second phase of the pipeline; the phase in
which the instruction is decoded. See also
pipeline; instruction-fetch
phase; operand-fetch phase; instruction-execute phase.
instruction-execute phase:
The fourth phase of the pipeline; the phase in
which the instruction is executed. See also
pipeline; instruction-fetch
phase; instruction-decode phase; operand-fetch phase.
instruction-fetch phase:
The first phase of the pipeline; the phase in which
the instruction is fetched from program-memory. See also
pipeline;
instruction-decode phase; operand-fetch phase; instruction-execute
phase.
instruction register (IR):
A 16-bit register that contains the instruction be-
ing executed.
instruction word:
A 16-bit value representing all or half of an instruction. An
instruction that is fully represented by 16 bits uses one instruction word.
An instruction that must be represented by 32 bits uses two instruction
words (the second word is a constant).
Glossary
