Teledyne 6 RU Chassis, Руководство по эксплуатации

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170 202058 REV AA 6 RU SSPA Chassis Operations Manual
D.2 Timing Issues with ALC
The ALC circuit is designed to compensate slow and steady drift of input signal and
can’t compensate sudden signal level changes. Overall adjustment speed depends on
the type of required adjustment.
For changes that require more than 5 dBm of level adjustments, ALC performs coarse
adjustment first (output signal will be adjusted within ± 2 dBm range) and then perform
fine adjustment to get the output signal to within a ± 0.3 dBm range from the set value.
For changes less than 5 dBm, the ALC circuit will not use coarse adjustment at all.
Overall time lag will be cumulative from the coarse and fine adjustment procedures.
Coarse adjustment speed is approximately 5 dBm/sec, and fine adjustment speed is
approximately 0.5 dBm/sec.